(10 mil, 拉平性线) AGND DDC_SCL_A1 R1 100 GPIO4/UART_DI SOT23 VGA_CONN CN1 DB15H-FEMALE 1 6 2 7 3 8 4 9 5 11 12 13 14 15 10 S1 S2 ZD5 5.6V 1 3 C4 0.01uF VGA_VCC GPIO4/UART_DI U2B 74LVT14 3 4 14 7 R13 75 C5 0.01uF R77 300 VGA_PG P.3 R9 100 GREEN- P.3 3 GPIO5/UART_DO P.3 R6 100 U2D 74LVT14 9 8 14 7 AGND BLUE+ P.3 C9 47pF ZD2 5.6V 1 3 GND DDC_SDA_A1 R14 10K GND GREEN+ P.3 75-ohm terminating resistor very close to the VGA conn. VGA_CONN R8 100 R12 75 AGND AGND R11 75 AGND C1 0.01uF R10 47 HARDING-DVT2 B ANALOG INPUT AOC B 2 9 Monday, May 13, 2002 Title Size Document Number Rev Date: Sheet of RED- P.3 R3 10K GPIO4/UART_DI P.3 1 VS P.3 DDC_SDA_A P.3 HS P.3 RED+ P.3 R7 47 C2 0.01uF U2C 74LVT14 5 6 14 7 R15 4.7K ZD6 5.6V 1 3 GPIO5/UART_DO DDC_VCC A0 --> A2 do not care GND GND R76 300 C7 0.01uF U1 24C21 4 8 1 2 3 7 6 5 GND VCC A0 A1 A2 WP SCL SDA ZD4 5.6V 1 3 1 2 3 D1 BAT54 DDC_SCL_A P.3 C8 47pF C3 0.1uF AGND Pins 6/7/8 are R/G/B return lines resp. AGND BLUE- P.3 VGA_PG R18 47 AGND (8 mil) DDC_VCC DDC_SCL_A ZD3 5.6V 1 3 C6 0.01uF R16 2K +3.3V GND DDC_SDA_A Connect two grounds at one single point only. R19 47 R2 100 R5 100 ZD1 5.6V 1 3 C10 0.1uF GND +5V VGA_VCC DDC_SDA_A1 GPIO5/UART_DO U2A 74LVT14 1 2 14 7 DDC_VCC 2 DDC_SCL_A1 R4 10K R17 2K GND Vpp=3.45V F=48.3KHZ U2A 作用是将行场同步反向，整 形，以提高兼容特性。 VGA 输入检测脚，空 信号时为高电平，TO U3 pin1 VGA 模拟接口 输入 RCLK P.4 EG7 R39 10K C21 0.1uF FB6 GPIO(22:16) is on "Host Port" pins OCM_START RMADDR0 C16 0.1uF +5V +2.5V LED_GRN P.4 DDC_SCL_A P.2 RMDATA3 GPIO3 R36 10K GND ER7 GND BLUE+ P.2 GPIO5/UART_DO P.2 EB2 R29 1K 0 = XTAL and TCLK pins are connected GND SCL C13 0.1uF R28 Bead 120 +5V GPIO2 P.4 R26 Bead 120 FB3 GND RMDATA3 TCON_EINV + C30 10uF x BLUE- P.2 SDA RMADDR15 C15 0.1uF ROM_ADDR(12:10) GND VGA_PG P.2 RP1 120ohm bead 1 2 3 4 5 6 7 8 R25 4.7K OR0 FB2 GND OR4 + C31 47uF C123 NC If using 6-wire host protocol, program this bit to 0 OR5 OG1 EB1 RMDATA1 2.5V_RXPL ER2 EB0 C130 22pF C27 0.1uF 1 = OCM becomes active after OCM_CLK is stable OR[0..7] P.4 GPIO6 P.4 RMDATA7 1 = All 48K of ROM is in external ROM EB4 BOOTSTRAP SIGNALS +3.3V GND RSP3 P.4 ACLK P.4 RMADDR1 Determines polarity of HCLK signal HARDING-DVT2 B gm2115 AOC C 3 9 Monday, May 13, 2002 Title Size Document Number Rev Date: Sheet of +3.3V GND C38 0.1uF GREEN- P.2 AUDIO_SD P.5 GPIO5/UART_DO RMADDR15 C129 22pF FB1 LED_ORANGE P.4 AUDIO_SD + C45 47uF OCM_ROM_CFG(1) RMADDR5 R40 10K RMADDR3 RMDATA7 C57 0.1uF GPIO6 RMADDR12 + C12 10uF RMADDR6 RMDATA1 SCLPOL EG0 R34 NC +3.3V RMDATA6 RMADDR8 ER3 C48 0.1uF + C29 47uF 1% 1 RMADDR3 C52 0.1uF C22 0.1uF OB4 C43 0.1uF R35 10K C56 0.1uF X1 14.318MHz 1 2 TCON_RCLK R27 Bead 120 C53 5pF RMADDR2 GPIO4/UART_DI C128 22pF R32 4.7K FLASH/ Prom-Jet Socket RMADDR6 RMADDR5 TCON_RSP2 GND PPWR P.4 RMDATA6 EG5 RMADDR2 ER6 C122 1nF GPIO4/UART_DI P.2 LP RMADDR11 RMADDR12 DESCRIPTION HOST_PROTOCOL GPIO4/UART_DI OR1 C26 0.1uF RED+ P.2 USER_BITS(7:5) ROM_ADDR7 RMADDR14 GPIO7 OB7 C131 22pF C20 0.1uF C25 0.1uF R22 Bead 120 GND GND ER[0..7] P.4 RMADDR11 RMADDR1 ER4 3.3V_RGB +3.3V GND BANK0 OG6 RMADDR4 RMADDR9 C133 22pF C46 0.1uF 3.3V_DVI XTAL SDA C55 5pF ROM_ADDR13 +5V OB2 C39 0.1uF Int_Test U3 GM2115 PQFP208 171 170 167 166 163 162 179 180 185 186 191 192 151 152 40 41 42 43 44 45 46 47 49 50 51 52 118 115 117 116 195 194 174 120 121 122 123 124 125 126 127 128 206 207 208 1 205 204 5 4 6 7 48 39 201 25 24 23 22 19 18 17 16 15 8 35 34 33 32 31 30 29 28 9 10 14 12 13 11 36 155 153 165 169 161 158 157 178 2 20 53 67 81 97 111 129 26 88 134 203 176 113 114 175 182 184 188 190 197 198 199 150 149 148 146 144 141 139 145 140 137 136 3 21 38 54 68 82 98 112 130 89 133 202 135 156 154 177 183 189 147 143 138 200 159 61 62 65 66 69 70 71 72 94 93 75 76 77 78 79 80 74 73 85 86 87 90 91 92 84 83 95 96 99 100 101 102 64 63 105 106 107 108 109 110 104 103 119 27 131 142 132 60 59 58 57 56 55 37 160 164 168 172 173 181 187 193 196 RED+ RED- GREEN+ GREEN- BLUE+ BLUE- RX2+ RX2- RX1+ RX1- RX0+ RX0- XTAL TCLK GPIO0/PWM0 GPIO1/PWM1 GPIO2/PWM2 GPIO3/TIMER1 GPIO4/UART_D1 GPIO5/UART_D0 GPIO6/EXTCLK GPIO7 GPIO10/TCON_ROE3 GPIO11 GPIO12 GPIO13 DCLK/TCON_OCLK DEN/TCON_ECLK DVS/TCON_FSYNC DHS/TCON_LP RXC- RXC+ REXT TCON_OPOL TCON_OINV TCON_ESP TCON_EPOL TCON_EINV TCON_RSP2 TCON_RSP3 TCON_RCLK TCON_ROE GPIO20/HDATA3 GPIO19/HDATA2 GPIO18/HDATA1 GPIO17/HDATA0 GPIO16/HFS GPIO22/HCLK RESETn GPIO21/IRQn DDC_SCL DDC_SDA GPIO9/TCON_ROE2 GPIO8/IRQINn CLKOUT ROM_ADDR0 ROM_ADDR1 ROM_ADDR2 ROM_ADDR3 ROM_ADDR4 ROM_ADDR5 ROM_ADDR6 ROM_ADDR7 ROM_ADDR8 ROM_ADDR15 ROM_DATA0 ROM_DATA1 ROM_DATA2 ROM_DATA3 ROM_DATA4 ROM_DATA5 ROM_DATA6 ROM_DATA7 ROM_ADDR14 ROM_ADDR13 ROM_ADDR9 ROM_ADDR11 ROM_ADDR10 ROM_ADDR12 ROM_OEn VDD1_ADC_2.5 VDD2_ADC_2.5 AGND_GREEN AGND_RED AGND_BLUE AGND_ADC SGND_ADC AGND_RX2 RVDD RVDD RVDD RVDD RVDD RVDD RVDD RVDD CVDD_2.5 CVDD_2.5 CVDD_2.5 CVDD_2.5 VDD_RX2_2.5 PPWR PBIAS AGND_IMB VDD_RX1_2.5 AGND_RX1 VDD_RX0_2.5 AGND_RX0 AGND_RXC AGND_RXPLL VDD_RXPLL_2.5 AVDD_RPLL AVSS_RPLL VDD_DPLL_3.3 AVDD_SDDS VDD_SDDS_3.3 AVDD_DDDS VDD_DDDS_3.3 AVSS_SDDS AVSS_DDDS HSYNC VSYNC RVSS RVSS RVSS RVSS RVSS RVSS RVSS RVSS RVSS CVSS CVSS CVSS CVSS GND1_ADC GND2_ADC GND_RX2 GND_RX1 GND_RX0 VSS_DPLL VSS_SDDS VSS_DDDS N/C ADC_TEST PD6/ER6 PD7/ER7 PD10/EG2 PD11/EG3 PD12/EG4 PD13/EG5 PD14/EG6 PD15/EG7 PD33/OG1 PD32/OG0 PD18/EB2 PD19/EB3 PD20/EB4 PD21/EB5 PD22/EB6 PD23/EB7 PD17/EB1 PD16/EB0 PD26/OR2 PD27/OR3 PD28/OR4 PD29/OR5 PD30/OR6 PD31/OR7 PD25/OR1 PD24/OR0 PD34/OG2 PD35/OG3 PD36/OG4 PD37/OG5 PD38/OG6 PD39/OG7 PD9/EG1 PD8/EG0 PD42/OB2 PD43/OB3 PD44/OB4 PD45/OB5 PD46/OB6 PD47/OB7 PD41/OB1 PD40/OB0 TCON_OSP CVSS Reserved N/C Reserved PD5/ER5 PD4/ER4 PD3/ER3 PD2/ER2 PD1/ER1 PD0/ER0 RVDD AVDD_ADC AVDD_BLUE AVDD_GREEN AVDD_RED AVDD_IMB AVDD_RX2 AVDD_RX1 AVDD_RX0 AVDD_RXC GND GPIO7 P.4 OR6 + C54 10uF GND Available for reading from a status register RS232 GND RMADDR14 C121 1nF GND + C51 10uF ROM_ADDR6 RMDATA2 EB6 GPIO0/PWM0 D2 1N4148 1 EG1 R30 10K +5V GND OG7 BANK0 C42 0.1uF R33 4.7K R24 2.7K PBIAS P.4 OB6 R38 10K 3.3V_RDDS RMADDR8 ROM_ADDR5 OB1 +3.3V U4 DS1813 3 2 1 VCC RSTN GND C18 0.1uF GND RMADDR0 AUDIO_SD C37 0.1uF C47 0.1uF C33 0.1uF Available for reading from a status register +3.3V GND OG[0..7] P.4 ROM_OEn GPIO2 TCON_OCLK SCL + C11 47uF C35 0.1uF EB[0..7] P.4 EG[0..7] P.4 TCON_ECLK ROM_ADDR(4:0) OB[0..7] P.4 SP P.4 /ROM_WE OR7 GND GND +2.5V PWM0 P.4 RMDATA5 RMDATA4 +5V +3.3V OB0 TCON_ESP C28 0.1uF R31 10K HOST_PORT_EN ER0 FB5 GND DDC_SDA_A P.2 EG3 C24 0.1uF R23 4.7K 1 x OPTION FOR 5115 OG3 +3.3V OR3 USER_BITS(4:0) RMADDR9 TCLK C50 0.1uF + C17 47uF TCON_LP FB4 RMDATA2 RMDATA4 GND RMADDR7 LP P.4 OG2 OG0 C41 0.1uF C34 0.1uF CN2 1 2 3 4 +5V TXD RXD GND Reserved GND OG4 EG2 RMADDR13 U6 24LC16B 1 2 3 4 5 6 7 8 A0 A1 A2 VSS SI SCK WP VCC BCLK P.4 GREEN+ P.2 RMDATA0 RMADDR10 C120 NC 32-Pin PLCC Socket Close to respective power Pins +5V GND ROM_ADDR9 AGND ROE P.4 RMDATA5 EB7 C19 0.1uF R21 Bead 120 SET RMADDR13 RMADDR10 TCON_RSP3 C36 0.1uF C49 0.1uF RMADDR7 TCON_EPOL EB5 x GND +3.3V Close to respective power Pins +2.5V RMADDR9 RMADDR4 3.3V_SDDS 0 VS P.2 VGA_PG Reset Circuit RSP2 P.4 OG5 C132 22pF x +3.3V HS P.2 GND RED- P.2 1K R37 GND ER1 EG4 TCON_ROE RMADDR14 C44 0.1uF U5 W49F020 3 29 28 4 25 23 26 27 5 6 7 8 9 10 11 12 21 20 19 18 17 15 14 13 24 31 32 1 16 2 30 22 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 OE WE VCC NC GND A16 NC/A17 CE ROM_ADDR14 GPIO3 P.4 RMADDR8 ADDRESS +3.3V POL P.4 3.3V_DDDS OR2 C32 0.1uF ROM_ADDR8 3.3V_DVI R20 Bead 120 ER5 OSC_SEL OB3 EB3 EG6 C40 0.1uF CP10 NC 1 5 6 8 4 3 2 7 /RESET C124 NC RMDATA0 C23 0.1uF 0 GND GND INV P.4 /ROM_WE C14 0.1uF NAME GPIO5/UART_DO OB5 If using 6-wire host protocol, program this bit to 1 VGA 模 拟 接 口 输入 Pin5 为复位脚，低电平有效 Pin36 为为 ROM 允许写入 功能脚，低电平有效，电压 在 1.72V~3.28V 变化。 为 工 厂 调 整 用的 Rs232 接 口 PIN40 为灯管亮度调 整，调整 PWM 波的 占空比。 PIN113,PIN144为 PANEL 供电及灯 管 ON/OFF 控制 脚，高电平为 ON VGA 输入检测脚，空 信号时为高电平，TO U3 pin1 SP U2F 74LVT14 13 12 14 7 C67 0.1uF GND PPWR P.3 OB5 JP2 U7 ARED2 ROE AGRN5 OR4 OR5 C105 1nF NC AGRN2 GND ARED5 ER6 OG5 EB7 ARED4 JP6 RCLK AGRN3 BRED5 BBLU3 R79 10K ACLK CN6 CON6 1 2 3 4 5 6 NC GND C125 1nF C109 1nF C61 10uF 2mm ABLU7 EB5 ABLU4 OR3 ARED2 GND BRED7 OR7 C66 47uF GND Q1 AO3401 1 3 2 D REDLED CP9 22pF 1 5 6 8 4 3 2 7 EG5 ABLU6 BGRN2 VCC_PNL OG4 OB4 BBLU3 C64 0.1uF RP11 BEAD 120ohm 1 2 3 4 5 6 7 8 RSP3 P.3 RP9 BEAD 120ohm 1 2 3 4 5 6 7 8 U7 FAN1117A-3.3 3 2 1 4 VIN VOUT GND TAB GND BRED2 BGRN6 CP1 22pF 1 5 6 8 4 3 2 7 array resistor nearU5 OB[0..7] P.3 OR6 NC 40mil 40mil AGRN4 CP7 22pF 1 5 6 8 4 3 2 7 R86 CN5 CON7 1 2 3 4 5 6 7 GND INV RSP2 BRED4 OG3 R85 GND KEY_LEFT CP3 22pF 1 5 6 8 4 3 2 7 CP4 22pF 1 5 6 8 4 3 2 7 EG6 RSP3 AGRN7 BGRN2 circuit1:with LDO ER5 ARED6 NC INV P.3 OG2 AGRN7 ABLU5 BRED6 BBLU2 BGRN7 G BBLU2 GND D GND POL BRED3 RP8 BEAD 120ohm 1 2 3 4 5 6 7 8 GND ARED3 RP2 BEAD 120ohm 1 2 3 4 5 6 7 8 ARED7 ABLU6 KEY_RIGHT R43 100K C66 GND GND BCLK BRED3 EB6 R41 220 GND RCLK P.3 AGRN4 +12V AGRN3 ER[0..7] P.3 BCLK P.3 CN3 IL-FPR-U40S 40 39 38 37 36 34 35 30 23 16 15 14 13 12 11 10 9 6 5 4 3 2 1 8 7 31 32 33 24 25 26 27 28 29 17 18 19 20 21 22 NC NC GND GND EB5 EB3 EB4 GND GND GND CPH1 GND GND STH LOAD POL REV STV1 STV2 CPV OE GND GND GND GND EB0 EB1 EB2 EG0 EG1 EG2 EG3 EG4 EG5 ER0 ER1 ER2 ER3 ER4 ER5 R45 10K BBLU5 0 RSP2 P.3 GPIO3 P.3 C65 NC ohm KEY_MENU RP5 BEAD 120ohm 1 2 3 4 5 6 7 8 0.1uF ARED7 JP1 JP2 G +3.3V +3.3V EB4 POL P.3 INV ABLU5 RCLK EG7 C134 C62 NC C67 LP P.3 BKLT_ADJ C110 1nF R85 100K after update GND LED_GRN P.3 BGRN4 Hannstar Dual-Bus Single-Port PBIAS P.3 OB2 before update CP8 22pF 1 5 6 8 4 3 2 7 RP7 BEAD 120ohm 1 2 3 4 5 6 7 8 AGRN5 S CP6 22pF 1 5 6 8 4 3 2 7 EG[0..7] P.3 ACLK P.3 AGRN6 EB2 JP4 LP BGRN5 RP4 10K*4 1 2 3 4 5 6 7 8 OB6 BBLU7 RP3 BEAD 120ohm 1 2 3 4 5 6 7 8 JP1 +3.3V AGRN6 0 GND LED_ORANGE P.3 GRNLED VCC_PNL GPIO2 P.3 EG4 SP ABLU3 BRED7 GND EB[0..7] P.3 ABLU2 OR2 C64 0.1uF ROE P.3 POL BBLU4 JP3 +12V SP P.3 BRED5 ARED6 U7 FAN1117A-3.3 3 2 1 4 VIN VOUT GND TAB ER7 ER3 C59 100uF 40mil ohm VCC_PNL LP + C63 47uF EG3 ARED3 AGRN2 + C63 47uF Q2 MMBT3904 3 1 2 R78 10K BGRN5 R44 4.7K 100K +5V PWM0 P.3 RP12 BEAD 120ohm 1 2 3 4 5 6 7 8 JP5 JP6 C108 1nF R45 10K GND BBLU6 U2E 74LVT14 11 10 14 7 circuit2:without LDO ER4 GND RSP3 C66 47uF ABLU7 CP5 22pF 1 5 6 8 4 3 2 7 R43 100K S BGRN6 GND GND +5V RSP2 BCLK OB7 C106 1nF ABLU2 C58 0.1uF Q2 MMBT3904 3 1 2 RP10 BEAD 120ohm 1 2 3 4 5 6 7 8 CN4 IL-FPR-U40S 40 39 38 37 30 23 16 14 13 15 12 11 10 9 8 7 6 5 4 3 2 1 31 32 33 34 35 36 24 25 26 27 28 29 17 18 19 20 21 22 VCC3_3 VCC3_3 GND GND GND GND GND GND GND CPH2 NC NC VGH NC VGL NC VGC NC NC NC GND GND OB0 OB1 OB2 OB3 OB4 OB5 OG0 OG1 OG2 OG3 OG4 OG5 OR0 OR1 OR2 OR3 OR4 OR5 NC ohm +3.3V OR[0..7] P.3 C67 0.1uF ROE JP3 JP4 3K OG6 BRED6 BRED2 BBLU4 ACLK ARED4 BKLT_EN R42 220 GND ABLU3 BGRN4 BBLU7 BGRN3 +5V OG[0..7] P.3 PPWR P.3 OG7 LCD_ONOFF BBLU5 C60 0.1uF VCC_PNL BGRN7 C134 0.1uF RP6 4.7K*4 1 2 3 4 5 6 7 8 JP5 0 R86 3K NC (5mm) BGRN3 (5mm) GND GPIO7 P.3 OB3 Q1 AO3401 1 3 2 C65 NC 40mil GPIO6 P.3 ARED5 C107 1nF C63 ohm HARDING-DVT2 B PANEL INTERFACE AOC C 4 9 Monday, May 13, 2002 Title Size Document Number Rev Date: Sheet of BRED4 EB3 EG2 BBLU6 CP2 22pF 1 5 6 8 4 3 2 7 ER2 ABLU4 40mil PANEL 供 电 ON/OFF 控制，高 电平为开启状态 PANEL 供 电 ON/OFF 控制，高 电平为开启状态 分 别 为 灯 管 亮 度 调 整、灯管 ON/OFF 控 制，高电平为 ON。 DATA 波形示意图 GND L/I 20-LEAD MOLDED TSSOP C112 0.1nF GND C69 0.1uF C117 1nF C127 0.1nF OUTL+ R75 100K GND GND VOLUME VR GND R74 100K C119 0.1nF 4 C103 0.1nF AUDIO_SDOWN R50 20K +5V GND + C74 100uF 5 GND C115 0.1nF C70 1uF GND CN11 CON2 1 2 RIGHT SPK CN9 CON4H 1 2 3 4 R48 1K 1.5mm C113 0.1nF 3 GND GND HEADPHONE R46 39K +5V C72 330n C116 0.1nF GND CN8 PHONEJACK 1 2 3 4 5 C73 1uF C111 0.1nF 1.5mm U8 LM4863 1 11 3 4 5 6 12 8 13 14 15 16 17 18 19 20 2 7 9 10 SHUTDOWN GND +OUT A VDD -OUT A -IN A GND +IN A +IN B BYPASS -IN B -OUT B VDD +OUT B GND HP-IN GND GND GND GND CN10 CON5H 1 2 3 4 5 R52 10K + C71 100uF 1.5mm HARDING-DVT2 B AUDIO INTERFACE AOC A 5 9 Monday, May 13, 2002 Title Size Document Number Rev Date: Sheet of GND + C68 100uF 2 C114 0.1nF R/O C104 0.1nF R53 4.7K C126 0.1nF L/O R/I AUDIO_SD P.3 LEFT SPK GND R51 39K OUTR+ C118 0.1nF +5V OUTR- R47 20K 1 R49 1K OUTL- CN7 CON2 1 2 1.5mm 1 +12V C100 47nF +3.3V GND R55 56K 2 1 C83 47uF GND C99 470p C92 1uF GND C95 330uF Delete F1 R65 12K (5mm) D3 SMB340 +2.5V Q3 2N3904 3 1 2 C76 10nF R60 100 +12V U9 RT9164-25CG 3 2 1 4 VIN VOUT GND TAB NON2 C88 0.1uF L5 Power Core Q5 2N3906 3 1 2 GND C91 47nF 2 GND +12V R61 18K L3 15uH C77 0.1uF R68 10K R73 10K Q7 AO4401 1 2 3 4 5 6 7 8 S S S G D D D D 3 GND OUT +5V R56 47K GND C R57 10 R67 47K C98 0.1uF Q8 2N3906 3 1 2 C85 0.01uF L4 15uH S3 HALL1 1 +5V R64 47K C96 0.1uF C101 330uF R70 1K H1 HALL 1 (5mm) U10 BA9741F 11 4 3 14 5 13 2 12 1 6 7 8 9 10 15 16 DT2 INV1 NON1 NON2 FB1 INV2 RT FB2 CV DT1 OUT1 GND VCC OUT2 SCP VREF GND H4 HALL 1 HARDING-DVT2 B MB POWER AOC B 6 9 Monday, May 13, 2002 Title Size Document Number Rev Date: Sheet of C89 0.01uF R71 100 R54 1K NON1 Q4 AO4401 1 2 3 4 5 6 7 8 S S S G D D D D C79 330uF C75 1nF S2 HALL1 1 3 NON2 C102 0.1uF C90 1nF R66 56K SOT-223 GND 2 GND IN GND R72 30K C97 0.1uF CN12 DC JACK 1 2 3 GND B GND C87 47uF GND H3 HALL 1 S4 HALL1 1 NON1 C86 1nF GND R62 20K (5mm) R63 30K C84 0.1uF Q6 2N3904 3 1 2 C93 1uF GND 螺丝孔 GND GND 3 GND GND C94 1uF S1 HALL1 1 1 GND GND SOT-23 D4 SMB340 GND R59 47K R69 18K 测试用接地孔 GND E H2 HALL 1 R58 30K 4 ON/OFF SW2 PUSHBUTTON CN3 CON5 1 2 3 4 5 SW3 PUSHBUTTON CN4 EARPHONE JACK 1 2 3 4 5 SW1 PUSHBUTTON R2 33 LEFT GREEN D1 LED2-COM N 1 2 2' 3 3' VR1 50K RIGHT HARDING-DVT2 B KEYPAD WITH SPK AOC A 8 9 Thursday, April 04, 2002 Title Size Document Number Rev Date: Sheet of R1 33 MENU CN1 CON7 1 2 3 4 5 6 7 SW4 PUSHBUTTON CN2 CON4 1 2 3 4 ORANGE SW4 PUSHBUTTON D1 LED2-COM N MENU SW1 PUSHBUTTON SW3 PUSHBUTTON RIGHT SW2 GREEN ON/OFF SW3 CN1 CON7 1 2 3 4 5 6 7 SW2 PUSHBUTTON SW4 SW1 LEFT ORANGE HARDING-DVT2 B KEYPAD W/O SPK AOC A 7 9 Thursday, April 04, 2002 Title Size Document Number Rev Date: Sheet of