采用GM5120和GM2120方案主板电路图纸(带中文注解)
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DDC_SDA_A
P.2
OG4
OR7
Determines polarity of HCLK signal
RMADDR3
R226
NC
OR3
RMDATA1
RMADDR3
OG6
U203.115
C219
0.1uF/16V
+2.5V
PPWR
P.5
EB7
RMDATA5
+A5V
LED_GRN
P.5
RMADDR1
+
C221
22uF/16V
GND
BLUE+
P.2
ER5
R205 1K
1/16W
ROM_ADDR(4:0)
DELETE RESET SW
7-21
C210
0.1uF/16V
GPIO8
P.4
SDA
C214
0.1uF/16V
C238
0.1uF/16V
GND
RMADDR7
DHS_LP
ROM_ADDR5
RMADDR13
OG2
EG2
R215
10K
1/16W
R222
10K
1/16W
+PV
HS
P.2
OR4
OG3
C234
0.1uF/16V
NC
R227
x
+A3.3V
R204
2.7K
1/16W
R237
NC
ADD DEN SIGNAL PIN 4/28
GND
RMDATA5
SDA
FB209
0
C215
0.1uF/16V
ROM_ADDR8
EB2
32-Pin PLCC Socket
Available for reading from a status register
+A5V
ER6
FB201
0
R231
NC
x
AGND
GND
CP202
2P
1
2
3
4
5
6
7
8
C208
0.1uF/16V
R207
10K
1/16W
EG6
/RESET
C235
0.1uF/16V
GND
GPIO3
P.4
TCON_OCLK
3.3V_SDDS
+2.5V
+A3.3V
RX1-
P.2
LVDS_EN P.5
GND
GPIO10
RMDATA6
RMADDR2
STDBY
ROM_OEn
DESCRIPTION
GPIO7
P.4
DDC_SCL_A
P.2
RMADDR15
OCM_START
RMADDR4
1
LED_ORANGE P.5
GPIO6
P.4
RS232
RMADDR11
ER7
RMDATA7
EG3
R233
NC
+A3.3V
GND
ER[0..7]
P.5
OB0
C254
NC
C250, C252 CHANGE EE, ADD R238---PWM 4/24
EB[0..7]
P.5
EB1
OR1
GND
GND
+
C243
100uF/16V
RMADDR2
C206
0.1uF/16V
+
C237
100uF/16V
C213
0.1uF/16V
NAME
10K DUAL
GND
MUTE
RMADDR1
VGA_PLUG
VOL
If using 6-wire host protocol, program this bit to 1
RMADDR11
AGND
+A5V
GPIO4/UART_DI
XTAL
RMADDR9
4/29 ADD S/W TEST PBIAS CONTROLL
糤 ゅ
--④⒀ ANALOG
OB7
+
C259
100uF/16V
C204
0.1uF/16V
C246
5pF
GND
GND
+
C250
22uF/16V
FB210
60
OB4
C242
0.1uF/16V
AGND
RX2+
P.2
GPIO5/UART_DO
DISP_CLK P.5
TCON_OSP
DEN
C253
22pF
+
C255
22u/16V
/ROM_WE
DHS
P.5
GND
VS
P.2
/ROM_WE
EB5
C227
0.1uF/16V
R237
+A3.3V
GPIO0/PWM0
C209
0.1uF/16V
+
C211
22uF/16V
x
GPIO(22:16) is on "Host Port" pins
EG4
C231
0.1uF/16V
R220
NC
GPIO7
DVS
3.3V_RGB
R230
NC
C202
0.1uF/16V
EG0
RMADDR3
FB202
0
Reset
Circuit
GND
DEN
DVS
OCM_ROM_CFG(1)
K/E Select
+A3.3V
EB3
EG5
R218
1K
C205
0.1uF/16V
+PV
DDC_SDA
P.2
U201
NC
3
2
1
VCC
RSTN
GND
1 = OCM becomes active after OCM_CLK is stable
0
gm5120
E
gm5120
AOC
C
3
6
Wednesday, October 16, 2002
Title
Size
Document Number
Rev
Date:
Sheet
of
R232
NC
+A3.3V
RX1+
P.2
RMADDR12
DIGITAL PORT
GND
GND
RMADDR8
GPIO3
ER1
OG7
RMADDR11
U202 W39F010P-70P
3
29
28
4
25
23
26
27
5
6
7
8
9
10
11
12
21
20
19
18
17
15
14
13
24
31
32
1
16
2
30
22
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
OE
WE
VCC
NC
GND
A16
NC/A17
CE
FB204
600OHM
C248
0.1uF/16V
DELETE 721
GND
+PV
OR[0..7]
P.5
EB6
RMADDR14
OG1
TCON_OPOL
CP201
22P
1
2
3
4
5
6
7
8
FB205
600OHM
+
C224
22uF/16V
ADD RESET SW1 4/19
RMDATA0
GPIO4/UART_DI
SCL
R236
NC
CN202
NC
1
2
3
4
+5V
TXD
RXD
GND
BOOTSTRAP SIGNALS
Close to respective power Pins
RMADDR4
C228
0.1uF/16V
RMDATA7
RMADDR6
Int_Test
U203
PQFP208
GM2120
171
170
167
166
163
162
179
180
185
186
191
192
151
152
40
41
42
43
44
45
46
47
49
50
51
52
118
115
117
116
195
194
174
120
121
122
123
124
125
126
127
128
206
207
208
1
205
204
5
4
6
7
48
39
201
25
24
23
22
19
18
17
16
15
8
35
34
33
32
31
30
29
28
9
10
14
12
13
11
36
155
153
165
169
161
158
157
178
2
20
53
67
81
97
111
129
26
88
134
203
176
113
114
175
182
184
188
190
197
198
199
150
149
148
146
144
141
139
145
140
137
136
3
21
38
54
68
82
98
112
130
89
133
202
135
156
154
177
183
189
147
143
138
200
159
61
62
65
66
69
70
71
72
94
93
75
76
77
78
79
80
74
73
85
86
87
90
91
92
84
83
95
96
99
100
101
102
64
63
105
106
107
108
109
110
104
103
119
27
131
142
132
60
59
58
57
56
55
37
160
164
168
172
173
181
187
193
196
RED+
RED-
GREEN+
GREEN-
BLUE+
BLUE-
RX2+
RX2-
RX1+
RX1-
RX0+
RX0-
XTAL
TCLK
GPIO0/PWM0
GPIO1/PWM1
GPIO2/PWM2
GPIO3/TIMER1
GPIO4/UART_D1
GPIO5/UART_D0
GPIO6/EXTCLK
GPIO7
GPIO10/TCON_ROE3
GPIO11
GPIO12
GPIO13
DCLK/TCON_OCLK
DEN/TCON_ECLK
DVS/TCON_FSYNC
DHS/TCON_LP
RXC-
RXC+
REXT
TCON_OPOL
TCON_OINV
TCON_ESP
TCON_EPOL
TCON_EINV
TCON_RSP2
TCON_RSP3
TCON_RCLK
TCON_ROE
GPIO20/HDATA3
GPIO19/HDATA2
GPIO18/HDATA1
GPIO17/HDATA0
GPIO16/HFS
GPIO22/HCLK
RESETn
GPIO21/IRQn
DDC_SCL
DDC_SDA
GPIO9/TCON_ROE2
GPIO8/IRQINn
CLKOUT
ROM_ADDR0
ROM_ADDR1
ROM_ADDR2
ROM_ADDR3
ROM_ADDR4
ROM_ADDR5
ROM_ADDR6
ROM_ADDR7
ROM_ADDR8
ROM_ADDR15
ROM_DATA0
ROM_DATA1
ROM_DATA2
ROM_DATA3
ROM_DATA4
ROM_DATA5
ROM_DATA6
ROM_DATA7
ROM_ADDR14
ROM_ADDR13
ROM_ADDR9
ROM_ADDR11
ROM_ADDR10
ROM_ADDR12
ROM_OEn
VDD1_ADC_2.5
VDD2_ADC_2.5
AGND_GREEN
AGND_RED
AGND_BLUE
AGND_ADC
SGND_ADC
AGND_RX2
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
RVDD
CVDD_2.5
CVDD_2.5
CVDD_2.5
CVDD_2.5
VDD_RX2_2.5
PPWR
PBIAS
AGND_IMB
VDD_RX1_2.5
AGND_RX1
VDD_RX0_2.5
AGND_RX0
AGND_RXC
AGND_RXPLL
VDD_RXPLL_2.5
AVDD_RPLL
AVSS_RPLL
VDD_DPLL_3.3
AVDD_SDDS
VDD_SDDS_3.3
AVDD_DDDS
VDD_DDDS_3.3
AVSS_SDDS
AVSS_DDDS
HSYNC
VSYNC
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
RVSS
CVSS
CVSS
CVSS
CVSS
GND1_ADC
GND2_ADC
GND_RX2
GND_RX1
GND_RX0
VSS_DPLL
VSS_SDDS
VSS_DDDS
N/C
ADC_TEST
PD6/ER6
PD7/ER7
PD10/EG2
PD11/EG3
PD12/EG4
PD13/EG5
PD14/EG6
PD15/EG7
PD33/OG1
PD32/OG0
PD18/EB2
PD19/EB3
PD20/EB4
PD21/EB5
PD22/EB6
PD23/EB7
PD17/EB1
PD16/EB0
PD26/OR2
PD27/OR3
PD28/OR4
PD29/OR5
PD30/OR6
PD31/OR7
PD25/OR1
PD24/OR0
PD34/OG2
PD35/OG3
PD36/OG4
PD37/OG5
PD38/OG6
PD39/OG7
PD9/EG1
PD8/EG0
PD42/OB2
PD43/OB3
PD44/OB4
PD45/OB5
PD46/OB6
PD47/OB7
PD41/OB1
PD40/OB0
TCON_OSP
CVSS
Reserved
N/C
Reserved
PD5/ER5
PD4/ER4
PD3/ER3
PD2/ER2
PD1/ER1
PD0/ER0
RVDD
AVDD_ADC
AVDD_BLUE
AVDD_GREEN
AVDD_RED
AVDD_IMB
AVDD_RX2
AVDD_RX1
AVDD_RX0
AVDD_RXC
RP201
120
1
2
3
4
8
7
6
5
C203
0.1uF/16V
GND
DEN
P.5
OR6
U203.117
C233
0.1uF/16V
+
C258
100uF/16V
If using 6-wire host protocol, program this bit to 0
+A3.3V
GND
+A3.3V
+PV
RMDATA2
R239
NC (4.7K)
C263
NC
DVS
P.5
GREEN+
P.2
RMADDR5
GPIO6
3.3V_DDDS
R221
10K
1/16W
C220
0.1uF/16V
+A3.3V
GND
DE/PD
P.5
RMADDR10
C241
0.1uF/16V
HOST_PROTOCOL
UART_DI
P.2
RMADDR10
RX0+
P.2
C226
0.1uF/16V
1 = All 48K of ROM is in external ROM
RMADDR8
RMADDR1
C212
0.1uF/16V
ROM_ADDR9
ROM_ADDR13
PWM0
P.4
R239
10K
0 = XTAL and TCLK pins are connected
EG1
EB4
R214
10K
1/16W
GND
OB[0..7]
P.5
R246
10K
SCLPOL
RMADDR4
C249
0.1uF/16V
C223
0.1uF/16V
+A3.3V
PBIAS
P.5
DVI_PLUG
P.2
RMADDR0
R212
NC
RMDATA2
RMADDR5
C216
0.1uF/16V
C247
5pF
GND
RMADDR9
RMDATA0
RMADDR12
RXC+
P.2
GREEN-
P.2
RMADDR2
OB2
RP202
33
1/16W
1
2
3
4
8
7
6
5
R213
0
1/16W
SET
RX0-
P.2
DDC_SCL
P.2
BANK0
R238
10K
ROM_ADDR7
Close to respective power Pins
TCLK
EB0
GND
GND
RMDATA4
OR2
OR0
RMADDR14
DVS
+
C256
100uF/16V
D201
LL4148
RMDATA4
+
C222
22uF/16V
+A3.3V
GND
RMADDR8
R201
10K
1/16W
X201
14.318MHz
1
2
USER_BITS(7:5)
OG[0..7]
P.5
ER2
OB5
C236
0.1uF/16V
C225
0.1uF/16V
DE/PD
P.5
OG0
U204
M24C16-MN6T
1
2
3
4
5
6
7
8
A0
A1
A2
VSS
SI
SCK
WP
VCC
FLASH/ Prom-Jet Socket
EG[0..7]
P.5
RMDATA1
+
C230
22uF/16V
OSC_SEL
x
GND
RMADDR14
C232
0.1uF/16V
Available for reading from a status register
Reserved
RED+
P.2
3.3V_DVI
DVI_PLUG
RMADDR0
FB203
600OHM
AGND
RMDATA3
OB1
RMDATA6
+
C257
100uF/16V
RMADDR10
SCL
R208
10K
1/16W
ROM_ADDR6
C244
0.1uF/16V
+PV
RED-
P.2
RMADDR15
ER0
U203.115
R235
0
1/16W
R241
NC
USER_BITS(4:0)
RX2-
P.2
OB6
EG7
DEN
RP203
33
1/16W
1
2
3
4
8
7
6
5
R240
47
1/16W
C207
0.1uF/16V
ROM_ADDR(12:10)
ROM_ADDR14
6/24
+A3.3V
RXC-
P.2
RMDATA3
/ROM_WE
1
RMADDR0
FB206
600OHM
1
OPTION FOR 5115
UART_DO
P.2
C218
0.1uF/16V
BLUE-
P.2
ER4
C240
0.1uF/16V
0
VGA_PG
P.2
/ROM_WE
RMADDR6
OB3
C239
0.1uF/16V
GPIO5/UART_DO
ER3
RMADDR9
FB208
0
ADDRESS
OG5
BANK0
+
C229
100uF/16V
R206
10K
1/16W
FB207
600OHM
RMADDR13
RMADDR12
+PV
GPIO2
P.4
R234
NC
C217
0.1uF/16V
HOST_PORT_EN
AGND
+5V
+3.3V
RMADDR7
OR5
U203.117
C201
0.1uF/16V
+
C245
22uF/16V
GND
R223
10K
1/16W
Pin5 为复位脚,低电
平有效
Pin36 为为 ROM 允许写入
功能脚,低电平有效,电压
在 1.72V~3.28V 变化
DVI 输入各 pin
模拟信号输入检测
脚,空信号为高电
平
DVI 输入检测 pin
Pin44/45 为工厂
调整用的 Rs232
接口
Pin113/114 分别为
PANEL 供电与灯管
ON/OFF 控制,ON
时为 3.23V。
Pin40,41 为 灯 管
亮度调整,音量调
整。调整 PWM 波
的占空比
为 工 厂 调 整
用的 Rs232 接
口
R/G/B DATA 输出
到 LVDS 的编码
IC 上
LVDS 的输出允许,
高电平为 ON 状态
Vpp=3.5V f=79.5Khz
R417
0
+3.3V
TX1-O
TX0+O
ER1
C305
0.1uF/16V
10/16 modify
OG0
TXCK-O
4/27 CHANGE
EB1
C307
0.1uF/16V
6/14 change
OR1
OB1
TXCK+E
CONNECTOR for PANEL
+3.3V
OG2
R312
NC
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