飞利浦PHILIPS DVP4000 DVD机电路原理图
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EN 3 3139 785 3172x DVP4000MKI DVP4000MKI Block Diagram DOOR LOCKING SWITCH 2 X LEDs POWER BUTTON RECEIVER 15 16 L 16 11 A K O J LOADER MODULE 1402 E F A KHM-310AHC POWER SUPPLY FRONT BOARD MPEG BOARD H K L J 4Mb FLASH SST39VF400A 2-CH AUDIO DAC CS4345 P P N 20 12 17 19 18 12 18 14 B C D D 3 4 5 MOTOR DRIVER AM5868 16Mb SDRAM IS42S16100 10 11 C B ANALOG VIDEO OUTPUT CVBS/Y/C/Y/Pb/Pr ZR36862 MPEG DECODER IC 6 3 2 G H 8 7 F 17 G E 10 20 15 19 14 13 1 13 1 M I 2 6 7 8 9 I M N O 4 9 5 3139 249 2755 EN 4 3139 785 3172x DVP4000MKI CN202 CN201 1601 1712 1609 1604 1608 1 24 25 26 1 F- 2 F+ 3 T+ 4 T- 5 C 6 D 7 CD/DVD 8 RF 9 A 10 B 11 F 12 GND-PD 13 Vc 14 VCC 15 E 16 NC 17 VR-CD 18 VR-DVD 19 LD-CD 20 MD 21 HFM 22 NC 23 LD-DVD 24 GND-LD 25 GND 26 GND 1609 Screw Post Note: The cable 1902 will be damaged by the screw if to lay it on the screw post during assembling bottom and top cabinet. 1 1 1 1 4 1 2 1 VCC (5V) 2 GND 3 -12V 4 GND 1601 1 STBYLED 2 OPEN/CLOSE 3 RC 4 GND 5 VCC 6 STOP 7 PLAY 8 LED 1608 1 SP- 2 SP+ 3 GND 4 HSW 5 SL- 6 SL+ 1712 1901 1902 1903 1405 1406 1906 1409 1904 PSU MPEG Board Front Board Door Locking Switch 1905 The ferrite ring is only for provision only 1 KHM310AHC KHM310AHC Wiring Diagram EN 5 3139 785 3172x Mono Board Circuit Diagram DVP4000MKI J I H G F E D C B A 1 7 6 5 4 3 2 13 12 11 10 9 8 13 12 11 10 9 8 7 6 5 4 3 2 1 J I H G F E D C B A DOWN_LOAD_I/F SW DEBUG Low = Standby DSPVCC18 SPDIF Y_R_V/OUT# IR +5VD CTR_STBY CTR_STBY +3.2V +2.5V STB COAX_SPDIF CVBS_G_Y/OUT# DSPVCC33 VCC33 CVBS_C/OUT# CVBS_G_Y/OUT# VCC33 Y_R_V/OUT# CTR_STBY CVBS_C/OUT# C_B_U_OUT# C_B_U_OUT# GND CTR_STBY D+5V COAX_SPDIF DUPTD0 DUPTD1 DUPRD0 DUPRD1 SPDIF DSPVCC33 RF33V DSPVCC33 CVBS_C/OUT CVBS_G_Y/OUT C_B_U/OUT STB Y_R_V/OUT MAIN_R OP/CL IRRCV STOP STBY LED MAIN_L PLAY SGND VGND AFEGND RFGND DSPVCC18 RFA5V A+5VL DSPVCC33 A+12V D+5V RF33V M5V D+5V VCC33 VCC33 VCC33 DSPVCC33 VCC33 VCC33 D+5V A+5VL D+5V D+5V 3743 91R 3777 NM 7723 PSS8050 2 1 3 5611 FB220R TP74 1 . 2844 0.1uF 6616 9.1V 3748 NM H2 H2 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 + 2707 47uF/16V 1 2 1631 NM 1 2 3 4 2675 1nF 5608 FB75R TP70 1 . 5609 FB220R 2703 0.1uF 3742 68R TP71 1 . 3769 1K + 2834 100uF/16V TP30 1 . 6605 1N4148 1 2 2738 1nF 5607 FB75R TP31 1 . 5612 FB220R + 2715 100uF/16V 1 2 5613 FB220R TP32 1 . 6617 1N4001 1 2 5610 FB75R TP33 1 . 6618 1N4001 1 2 6612 1N4148 1 2 TP75 1 . TP34 1 . 5628 FB220R + 2709 47uF/16V 1 2 6615 1N4148 1 2 1601 Power 1 2 3 4 6614 1N4148 1 2 + 2853 10uF/16V 1 2 TP36 1 . 3739 33R TP37 1 . 3733 NM 3772 3.3K 3740 0R TP39 1 . 3773 10K 2739 1nF 1606 VIDEO OUT 5 1 6 8 7 3 9 10 2 4 11 5606 FB75R TP40 1 . 2645 1nF TP41 1 . 5614 FB220R 3774 33R/1% 6611 1N4148 1 2 TP42 1 . 3775 120R/1% 6613 1N4148 1 2 TP43 1 . TP72 1 . TP44 1 . 2646 1nF + 2712 220uF/16V 1 2 3721 100R TP45 1 . + 2722 100uF/16V 1 2 TP46 1 . 5618 FB220R TP47 1 . 2705 0.1uF + 2839 100uF/16V 1 2 7614 TL431 1 2 3 Ref AC 2704 11pF 6610 1N4148 1 2 3770 NM 2836 0.1uF 3741 150R TP76 1 . 2837 0.1uF 3768 1K 6604 1N4148 1 2 7715 NM 1 2 3 5615 FB220R 2698 0.1uF 3749 NM 7615 NM 1 2 3 ADJ/GND OUT2 IN 1614 AUDIO OUT 1 5 3 4 6 2 7 8 H1 H1 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 3778 10K 3771 33R + 2708 220uF/16V 1 2 7714 BC858 1 2 3 TP73 1 . TP50 TEST POINT 1 2 TP51 TEST POINT 1 2 7721 BC848 1 2 3 5616 FB220R 7726 BC848 1 2 3 TP35 1 . 7722 SI2301BDS 3 1 2 7725 PSS8050 2 1 3 1604 NM 1 2 3 4 3767 1K 2643 1nF 1608 TO VFD 1 2 3 4 5 6 7 8 + 2711 47uF/16V 1 2 3779 470R 2740 1nF GND 3139 243 3177 EN 6 3139 785 3172x Mono Board Circuit Diagram J I H G F E D C B A 1 7 6 5 4 3 2 13 12 11 10 9 8 13 12 11 10 9 8 7 6 5 4 3 2 1 J I H G F E D C B A JP2,JP3 settings: 1)Play mode: All Jumps off 2)Download mode: JP3's 1-2 short only 3)SW Debug mode: JP2's 1-2 short only reset button Low = Standby SDRAM speed <=7ns PCLK OSCIN DEFECT I2CDAT I2CCLK MEMDA8 DUPTD1 MEMDA7 RAMADD1 MEMDA15 DUPRD0 RAMDAT14# MEMAD4 RAMDAT4# RAMADD3 MEMCS1- RAMADD7 MEMDA9 MEMAD20 MEMDA13 MEMAD16 MEMAD5 OSCOUT RAMDAT2# RAMDAT8# MEMDA2 MEMDA11 MEMCS0- MEMAD2 RAMWE- RAMBA RESET- RAMDAT0# RAMRAS- RAMADD0 MEMDA4 MEMDA12 MEMAD12 PLLCFGA STOP RAMDAT13# RAMDAT11# RAMADD4 MEMAD6 MEMDA3 DUPRD1 LDON MEMDA14 MEMAD10 RAMDAT15# RAMDAT9# RAMADD2 MEMAD17 MEMAD9 MEMAD11 PLLCFGP MEMAD13 MEMAD3 RAMDAT10# MEMDA0 SPDIF RAMDAT7# RAMADD8 MEMAD8 MEMDA6 MEMAD14 MEMAD15 STBY IRRCV INSW RAMDAT5# RAMDQM RAMADD10 RAMADD5 DUPTD0 DRVSB RAMCS0- MEMRD- RAMDAT12# MEMDA1 MEMAD18 MEMDA10 MEMWR- RAMDAT1# MEMAD7 MEMDA5 PLAY MEMAD19 HOMESW SPDL_SENS OSCOUT RESET F33V DSPVCC33 RAMCAS- MIRR RAMADD9 MEMAD0 RAMDAT6# RAMDAT3# MEMAD1 RAMADD6 RAMDAT13 RAMDAT11 RAMADD2 RAMADD8 RAMDAT10 RAMWE- RAMADD10 RAMBA RAMCS0- RAMADD5 RAMDAT12 RAMDAT9 RAMDAT3 RAMDQM RAMDAT14 RAMADD3 RAMDAT7 RAMDQM RAMADD0 RAMDAT15 RAMRAS- RAMDAT6 RAMDAT0 RAMADD1 RAMADD9 RAMADD4 PCLK RAMDAT1 RAMDAT2 RAMDAT8 RAMADD7 RAMCAS- RAMDAT4 RAMDAT5 RAMADD6 DSPVCC18 VDDA VDDA RAMCS1- OSCIN RAMDAT1 RAMDQM RAMDAT4 RAMDAT6 RAMDAT10 RAMBA RAMCAS- RAMADD8 RAMADD9 RAMDAT5 RAMADD10 RAMDAT0 RAMADD4 RAMDAT9 RAMDAT8 RAMCS1- RAMWE- RAMDAT3 RAMCS0- RAMRAS- RAMADD11 PCLK RAMDAT15 RAMDAT13 RAMADD3 RAMDAT12 RAMADD5 RAMDAT7 RAMDAT11 RAMDAT2 RAMADD1 RAMADD7 RAMADD2 RAMADD0 RAMADD6 RAMDAT14 RAMADD11 OP/CL F33V RAMDAT15# RAMDAT0# RAMDAT1# RAMDAT14# RAMDAT15 RAMDAT0 RAMDAT1 RAMDAT14 RAMDAT2# RAMDAT13# RAMDAT3# RAMDAT12# RAMDAT2 RAMDAT13 RAMDAT3 RAMDAT12 RAMDAT4# RAMDAT11# RAMDAT5# RAMDAT10# RAMDAT6# RAMDAT9# RAMDAT7# RAMDAT8# RAMDAT4 RAMDAT11 RAMDAT5 RAMDAT10 RAMDAT6 RAMDAT9 RAMDAT7 RAMDAT8 SPDL_SENS DEFECT MIRR IRRCV STBY OP/CL STOP PLAY MEMCS1- MEMWR- MEMRD- MEMCS0- MEMAD[20:0] MEMDA[15:0] RFA_SDEN RFA_SDATA RFA_SCLK SLED_PWM SPINDLE_PWM TRACK_DAC FOCUS_DAC C_B_U Y_R_V CVBS_C CVBS_G_Y DUPTD1 VR_SEL DRVSB HOMESW LDON I2CCLK AMCLK ABCLK ALRCLK AOUT0 SPDIF SVREF15 AAF_PI AAF_TE AAF_FE AAF_CE LINK VBIASS1 RFINN RFINP DUPRD1 DUPTD0 DUPRD0 I2CDAT RESET LED DSPVCC33 AMUTE STB AOUT3 VGND AFEGND SGND VGND DSPVCC18 DSPVCC18 DSPVCC33 DSPVCC33 DSPVCC33 DSPVCC33 DSPVCC33 DSPVCC33 DSPVCC18 DSPVCC33 3614 1K + 2608 4.7uF/16V 2803 0.1uF + 2609 100uF/16V 2811 0.1uF 2810 0.1uF 2644 0.1uF 5603 FB220R 2813 0.1uF 3601 75R 3611 33R 3618 4.7K 3619 91R 2819 0.1uF 2670 10pF + 2701 47uF/16V 5631 FB220R 3610 33R + 2702 47uF/16V 7603 IC42S16100-TC/L70 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 VDD DQ0 DQ1 VSSQ DQ2 DQ3 VDDQ DQ4 DQ5 VSSQ DQ6 DQ7 VDDQ LDQM WE CAS RAS CS BA A10/AP A0 A1 A2 A3 VDD VSS DQ15 DQ14 VSSQ DQ13 DQ12 VDDQ DQ11 DQ10 VSSQ DQ9 DQ8 VDDQ NC UDQM CLK CKE NC A9 A8 A7 A6 A5 A4 VSS 3600 10K 2815 0.1uF 3608 4.7K 2606 24pF 2809 0.1uF 1627 1 2 2602 24pF 5602 FB220R 3801 33Rx4 1 2 3 4 5 6 7 8 3609 0R + 2607 100uF/16V 5604 FB220R TP77 1 . 3606 330R 3803 33Rx4 1 2 3 4 5 6 7 8 1625 NM 1 2 1624 NM 1 2 + 2603 100uF/16V + 2605 100uF/16V 1611 SWITCH 3 4 1 2 + 2610 47uF/16V 3616 NM 2820 1uF 2802 0.1uF 2849 5P 3603 392R/1% 2601 NM(220pF) + 2604 100uF/16V 2823 0.1uF 2818 0.1uF 570127.000MHz 5601 FB220R 2806 0.1uF TP78 1 . 3612 4.7R 2847 0.1uF 5620 NM(2.7uH) 1623 NM 1 2 2848 0.1uF 2816 0.1uF 2817 1uF 2808 0.1uF + 2663 47uF/16V TP48 1 . 2812 0.1uF 7601 ZR36762 12 1 2 3 4 5 6 7 8 9 10 11 50 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 51 52 53 54 55 62 56 57 58 59 60 61 72 63 64 65 66 67 68 69 70 71 83 73 74 75 76 77 78 79 80 81 82 91 84 85 86 87 88 89 90 101 92 93 94 95 96 97 98 99 100 102 103 104 105 156 155 154 152 151 145 136 144 143 142 141 140 139 138 127 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 205 204 202 192 190 200 187 195 197 186 185 184 175 174 173 172 171 157 169 160 167 165 164 163 162 161 159 158 39 40 41 42 43 44 45 46 47 48 49 106 107 108 109 126 128 129 130 131 132 133 134 135 137 146 147 148 149 150 153 166 168 170 183 182 181 180 179 178 177 176 188 189 191 193 194 196 198 199 201 203 206 207 208 GNDP SSCRXD/GPCIO[17] MEMCS[1]#/GPCIO[18] VDDP MEMAD[15]/PLLPROG[0] MEMAD[16]/PLLPROG[1] MEMAD[14]/PLLPROG[2] MEMAD[13]/AFETESTEN MEMAD[12]/[PLLCFGA] MEMDA[15] MEMAD[11]/[PLLCFGP] MEMDA[7] GNDP MEMAD[10]/[TESTMODE] MEMDA[14] MEMAD[9] MEMDA[6] MEMAD[8] MEMDA[13] MEMDA[5] MEMAD[20]/[GPCIO19]/[MEMCS#2] VDDP MEMDA[12] MEMWR# MEMDA[4] VDDC MEMDA[11] MEMDA[3] MEMAD[19]/[PLLSEL] GNDC MEMDA[10] MEMAD[18] GNDP MEMDA[2] MEMAD[17] MEMDA[9] MEMAD[7] MEMDA[1] MEMAD[6] VDD-IP VDDP RAMADD[4] RAMADD[3] RAMADD[5] GNDP RAMADD[2] RAMADD[6] VDDP RAMADD[1] RAMADD[7] RAMADD[0] GNDP RAMADD[8] VDDC RAMADD[10] GNDC RAMADD[9] VDDP RAMADD[11] RAMCS[0]#/RAMBA[1] RAMBA[0] GNDP RAMCS[1]# RAMRAS# RAMCAS# VDDP RAMWE# RAMDQM GNDPCLK PCLK VDDPCLK RAMDAT[8] GNDP RAMDAT[7] RAMDAT[9] RAMDAT[6] VDDP RAMDAT[10] RAMDAT[5] RAMDAT[11] GNDP RAMDAT[4] VDDC RAMDAT[12] GNDC RAMDAT[3] VDDP RAMDAT[13] RAMDAT[2] RAMDAT[14] RAMDAT[1] RAMDAT[15] RAMDAT[0] VDDP DUPTD1/GPCIO38 DUPRD1/GPCIO37 VDD-IP DUPRD0/GPCIO35 GNDP GPCI/O[32] GPCI/O[31] VDDP GCLKA GCLKP XO VDDA RESET# GNDA VDDP GNDP HSYNC/GPCIO25/[CJTDO] VDDC VSYNC/GPCIO24/[CJTDI] GNDC AIN/[GPCIO23/CJTCK] VDDP-A2 AMCLK GNDP-A2 ABCLK ALRCLK GPAIO/[AOUT3] AOUT[0] AOUT[1]/[GPCIO22] AOUT[2]/[GPCIO21] SPDIF SLEDPULSE/IDGPCIO6 VDDP GNDP VDDC GNDC DEFECT/IDGPCIO5 PWMACT[0]/GPCIO39 GNDPWM VDDPWM GNDAFES VBIASS1 VBIASS0 VDDAFES GNDAFERF RFINN RFINP VDDAFERF GNDDACD DACDRIVE[1] VDDDAC DACDRIVE[0] GNDDACBS2 GNDDACP RSET C/B/U Y/R/V/[C] CVBS/C/[Y] CVBS/G/Y MEMDA[8] MEMAD[5] VDDP MEMDA[0] MEMAD[4] MEMRD# MEMAD[3] MEMAD[2] MEMCS[0]# MEMAD[1]/[BOOTSEL2] MEMAD[0]/[A]PLLSEL/[BOOTSEL1] CPUNMI/GPCIO[20] GNDP [A]GPCIO110/BOOTSEL1/[AOUT3/ICGPCIO0] [A]GPCIO111/BOOTSEL2/[IDGPCIO0] COSYNC/GPCIO120/[ICGPCIO1/CJTMS] GPCIO26/ICETMS/[DJTMS] ICETDI/GPCIO122/[ICGPCIO2/DJTDI] ICETDO/GPCIO123/[IDGPCIO1/DJTDO] ICETCK/GPCIO27/[DJTCK] GPCIO28/DJTMS GPCIO29/DJTDI GPCIO30/DJTDO GPCIO128/DJTCK/[ICGPCIO3] GPCI/O[130]/[IDGPCIO2] GPCI/O[135]/[ICGPCIO4] GPCI/O[33] GPCI/O[137]/[ICGPCIO5] GPCI/O[34] GPCI/O[139]/[IDGPCIO3] DUPTD0/GPCIO36 GNDDACPS VDDDACS GNDDACDS ADCIN0 ADCIN1 ADCIN2 ADCIN3 ADCIN4 ADCIN5 ADCIN6 ADCIN7 PWMACT[1]/GPCIO40 PWMCO[0]/GPCIO41 PWMCO[1]/GPCIO42 PWMCO[2]/GPCIO43 PWMCO[3]/GPCIO44 PWMCO[4]/GPCIO45 PWMCO[5]/GPCIO46 PWMCO[6]/GPCIO152/[IDGPCIO4] ICGPCIO6 GPCIO159/[ICGPCIO7] SPINDLEDPULSE/IDGPCIO7 SSCCLK/GPCIO47 SSCTXD/GPCIO16 3615 NM 3804 33Rx4 1 2 3 4 5 6 7 8 2805 0.1uF 2804 0.1uF + 2600 47uF/16V 3602 330K 2801 0.1uF 2851 0.1uF 2822 1uF 2814 0.1uF 3802 33Rx4 1 2 3 4 5 6 7 8 2807 0.1uF 3605 NM 3692 NM 7607 NM 1 2 4 6 5 7 3 8 10 12 11 13 9 15 16 17 18 19 35 22 23 24 25 26 14 28 29 30 31 32 33 34 36 37 38 39 40 43 42 44 46 45 47 49 48 50 52 51 53 41 20 21 27 54 VCC DQ0 DQ1 VSSQ DQ2 DQ3 VCCQ DQ4 DQ5 VSSQ DQ6 DQ7 VCCQ DQML WE CAS RAS CS A11 A10 A0 A1 A2 A3 VCC VSS A4 A5 A6 A7 A8 A9 NC CKE CLK DQMH NC VCCQ DQ8 DQ9 VSSQ DQ10 DQ11 VCCQ DQ12 DQ13 VSSQ DQ14 DQ15 VSS BA0 BA1 VCC VSS GND 3139 243 3177 DVP4000MKI EN 7 3139 785 3172x Mono Board Circuit Diagram J I H G F E D C B A 1 7 6 5 4 3 2 13 12 11 10 9 8 13 12 11 10 9 8 7 6 5 4 3 2 1 J I H G F E D C B A A19 NC NC RY/BY# BYTE# JP1 : a)Flash memory(U5) : 1-3 short only b)External SRAM( J16) : 1-2 and 3-4 short Flash speed <= 70 nS EXTERNAL SRAM PORT Remove JP5 and install 3727 with 0R resistor for MP EXTERNAL SRAM PORT MEMAD14 MEMAD13 MEMAD12 MEMAD11 MEMAD10 MEMAD9 MEMAD8 MEMAD18 MEMAD17 MEMAD7 MEMAD6 MEMAD4 MEMAD3 MEMAD2 MEMAD1 MEMAD16 MEMDA7 MEMDA14 MEMDA6 MEMDA13 MEMDA5 MEMDA12 MEMDA4 MEMDA11 MEMDA3 MEMDA10 MEMDA2 MEMDA9 MEMDA1 MEMDA8 MEMDA0 MEMRD- MEMAD0 MEMDA15 AMEMAD19 FLASHCS- RESET- MEMDA[15:0] MEMAD15 MEMAD20 MEMAD5 MEMCS0- MEMCS1- SSRAMCS- FLASHCS- DSPVCC33# MEMWR- DSPVCC33# MEMRD- MEMWR- IMEMAD19 MEMAD[20:0] MEMAD19 DSPVCC33# I2CDAT I2CCLK GND MEMAD14 MEMWR- SSRAMCS- MEMAD16 MEMAD7 MEMAD4 MEMDA8 MEMAD19 MEMDA0 MEMDA12 MEMAD10 MEMAD13 MEMDA10 MEMDA3 MEMDA15 MEMAD15 MEMAD3 MEMDA13 MEMAD2 MEMAD1 MEMDA9 MEMAD11 GND MEMAD17 MEMAD9 DSPVCC33# MEMDA11 MEMDA5 MEMDA14 DSPVCC33# GND MEMDA7 MEMDA2 MEMDA4 MEMAD5 MEMDA1 GND MEMAD6 MEMDA6 MEMAD0 MEMAD12 MEMAD18 MEMAD8 MEMRD- MEMDA[15:0] MEMAD[20:0] RESET MEMRD- MEMWR- MEMCS0- MEMCS1- I2CDAT I2CCLK DSPVCC33 DSPVCC33# DSPVCC33# DSPVCC33# DSPVCC33 7611 24C02 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA 3729 4.7K + 2830 47uF/16V 7610 39VF400A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A15 A14 A13 A12 A11 A10 A9 A8 NC A20 WE# RP# VPP WP# A19 A18 A17 A7 A6 A5 A4 A3 A2 A1 A16 VCCQ GND DQ15 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# GND CE# A0 3725 0R 2833 0.1uF 3727 0R 3726 NM 2700 0.1uF 1610 NM 3 4 1 2 3728 NM 3730 4.7K 5630 FB220R 1628 NM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 3139 243 3177 DVP4000MKI EN 8 3139 785 3172x Mono Board Circuit Diagram J I H G F E D C B A 1 7 6 5 4 3 2 13 12 11 10 9 8 13 12 11 10 9 8 7 6 5 4 3 2 1 J I H G F E D C B A HIGH--MUTE LOW--OPERATE NOTICE:WHEN LAYOUT,78L05 NEAR 2684 MUTEL MUTER A+12V MUTE MUTE AOUTR AOUTL AOUT0# AOUT0 AOUT3 ABCLK# AMCLK# ABCLK AMCLK ALRCLK# ALRCLK AOUTR MUTE VQ+ VQ+ VQ+ AOUTL MAIN_L MAIN_R AOUT0 AOUT3 ABCLK ALRCLK AMCLK C_B_U/OUT Y_R_V CVBS_G_Y C_B_U CVBS_G_Y/OUT CVBS_C Y_R_V/OUT CVBS_C/OUT AMUTE A+12V A12V A12V A+12V D+5V A+12V 3693 3.3K + 2838 47uF/16V + 2669 220uF/16V 1 2 2684 47uF/16V 2688 150pF + - 7606A JRC4558 3 2 1 8 4 2857 47uF/16V 1 2 2689 160pF 7710 BC848 1 2 3 7724 BC858 1 2 3 2664 120pF 6609 1N4148 1 2 2695 11pF 2696 150pF 2683 0.1uF 7712 BC848 1 2 3 3713 2K 3710 33R 3761 33R 2686 160pF 3714 4.7K 3762 33R 2694 160pF + 2840 220uF/16V 3715 75R 1% 2858 0.1uF 2678 47uF/16V 1 2 2691 11pF 2697 160pF 2665 22uF/16V 1 2 3701 10K 2671 0.1uF 3691 18K 2674 22uF/16V 1 2 2667 47uF/16V 1 2 3711 33R 2693 150pF 2677 22uF/16V 1 2 3712 NM 3702 47K 6608 1N4148 1 2 3690 10K 7727 BC858 1 2 3 3684 330R 3723 75R 1% 3796 10K 2855 1nF + 2831 47uF/16V 3703 47K 2687 11pF 3716 4.7K 2673 0.1uF 3700 330R 3724 75R 1% 7728 1.1uH 3689 470R 2668 1nF 2666 22uF/16V 1 2 2679 1nF 3719 75R 1% 3687 10K 2685 150pF 3717 33K 7729 1.1uH 2856 1nF 3707 10K 7609 CS4345 10 5 2 1 9 3 7 8 6 4 AOUTL VQ SCLK DATA VA LRCK AOUTR AGND FILT+ MCLK + - 7606B JRC4558 5 6 7 8 4 2680 0.1uF 3786 10K 7711 BC848 1 2 3 6640 1N4148 1 2 3683 3.3K 3763 33R 2682 11pF + 2692 220uF/16V 3709 470R 3797 100R 7731 1.1uH + 2832 220uF/16V 2672 120pF TP79 1 . 3681 10K 7730 1.1uH 7608 78L05 1 2 3 OUT GND IN 6641 1N4148 1 2 3682 18K 3139 243 3177 DVP4000MKI EN 9 3139 785 3172x Mono Board Circuit Diagram E D C B A 1 7 6 5 4 3 2 13 12 11 10 9 8 13 12 11 10 9 8 7 6 5 4 3 2 1 J I H G F J I H G F E D C B A VR_SEL Logic: CD=LOW DVD=HIGH CD/DVD_SW Logic: CD=HIGH DVD=LOW HFE>300 HFE>300 KHM310 OPU The vaule out of () is used for AM5868S. The vaule in () is used for BA5954. AAF_CE AAF_FE VC25 AAF_PI FACT+ FACT- OPU_D RFA_FE SVREF15 RFA_LDON RFA_MIRR OPU_A RFA_SDEN FNP AAF_TE AAF_CE RF-SIGNAL OPU_B RFA_TE RFA_SDATA RFA_PI RFINP OPU_E OPU_C +5VL FNN RFINN RFA_DEFECT LaserMD OPU_F TACT+ SLED_PWM1 SLED- VC2 SEN_OPMO SEN_OPM- TRACK_DAC1 DSPVCC33 SEN_OPM+ FOCUS_DAC1 TACT- FACT- FACT+ MOT_SPDL+ DRVSB MOT_SPDL- SLED+ SEN_OPMO MOT_SPDL+ MOT_SPDL- SEN_OPM- SEN_OPM+ DVDLD CDLD TACT+ TACT- RFINN LDON AAF_TE AAF_PI RF33V RFA_SCLK RFA_SDEN SVREF15 LINK RFA_SDATA RFINP DEFECT AAF_FE AAF_CE VR_SEL MIRR HOMESW VBIASS1 FOCUS_DAC TRACK_DAC SLED_PWM DRVSB SPDL_SENS RFA5V SGND RF33V RFGND RFA5V RFGND RFGND RFGND RF33V RFA5V RFA5V RFGND RFGND RFA5V RFGND MGND RFGND RFGND RFA5V RFA5V MGND RFGND MGND MGND MGND RF33V MGND MGND MGND M5V MGND MGND MGND RF33V M5V RF33V MGND M5V MGND MGND MGND 2649 0.1uF 2648 0.1uF 3780 NM(0R) 2611 0.1uF 7702 BC848 1 2 3 3781 10K(NM) 3648 100R/1% 7704 BC858 1 2 3 3624 10K TP9 1 . 1712 TO DRIVE 1 2 3 4 5 6 2626 470pF/10% 2647 NM 2657 560pF TP23 1 . 3645 4.7K 3632 1.3K TP8 1 . 3784 NM(0R) 3676 NM(1R) 2656 NM(100pF) TP11 1 . 7732 FB220R 3785 NM(0R) 3671 NM(6.8K) 3622 NM(0R) 3628 11K TP24 1 . 2825 0.1uF 3630 0R(NM) 3629 1M TP21 1 . 3631 2.7K 3656 5.6K 3789 4.7K(NM) 2827 0.1uF 3792 390R 3640 NM(0R) TP7 1 . 3650 100R/1% 3788 0R(NM) 3638 0R(NM) TP10 1 . 3651 10K/1% 3643 220R TP13 1 . 3621 4.7K 3623 12K/1% 3649 10K/1% TP5 1 . 3677 NM(1R) TP19 1 . 3647 11R 2634 560pF 2654 0.1uF 7605 AM5868(BA5954) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 29 30 VINFC CFCERR1(OP2IN-) CFCERR2(OP2IN+) VINSL+ VINSL-(OP2OUT) VOSL(CLOSE) VNFFC(OPEN) VCC PVCC1(LOAD-) PGND(LOAD+) VOSL- VOSL+ VOFC- VOFC+ STBY BIAS VINTK CTKERR1(OP1IN+) CTKERR2(OP1IN-) VINLD PREGND PVCC2 VNFTK(OP1OUT) PGND(VCC2) VOLD- VOLD+ VOTK- VOTK+ GND GND1 TP2 1 . 2638 0.1uF/10% 2637 220pF/10% 3652 10K/1% 2615 1nF/10% 2640 2.7nF 2623 2.2nF/10% TP6 1 . 7701 BC848 1 2 3 + 2621 100uF/16V 2660 27nF TP15 1 . 7703 BC848 1 2 3 2659 27nF TP16 1 . 3674 0R(1R) TP17 1 . 2629 0.1uF/10% TP20 1 . + - 7602B NM(TL3472) 5 6 7 8 4 2661 220uF/16V 7734 10uH 2627 2.2nF/10% 3795 NM 3607 NM 7604 ZR36707 1 2 3 4 5 6 7 8 9 10 11 12 13 14 31 20 29 23 24 28 26 19 25 18 33 27 22 21 17 44 45 46 37 30 40 42 43 35 48 47 38 41 39 36 32 52 53 54 61 58 64 63 51 50 49 59 57 62 60 55 56 15 16 34 DVDRFP DVDRFN A2 B2 C2 D2 CP CN D C B A CD_D CD_C MIN VC MB DVDPD CDPD MP LDON VPB VNB CD_E LINK MIRR CDLD DVDLD CD_F LCP V33 SCLK V25 MLPF FE MNTR LCN TPH SDEN SDATA PI CE TE V125 MEVO FNN FNP DIP ATON VPA RFDC RFSIN VNA MEV RX AIP RFAC ATOP AIN DIN BYP CD_B CD_A DFT 3659 NM(47K) 3668 11k 3662 5.6K TP1 1 . 3625 1.2K 1609 24P-HEAD/bottom 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 25 26 GND-LD DVD-LD NC HFM MD CD-LD VR-DVD VR-CD NC E VCC VC(VREF) GND/PD F B A RF CD/DVD_SW D C T- T+ F+ F- GND GND 2650 0.1uF 3793 NM(0R) TP61 1 . 3667 0R(NM) TP62 1 . 2616 1nF/10% 2658 NM(4.7nF) 3627 10K TP64 1 . 2828 0.1uF 3639 4.7K 3620 4.7K TP63 1 . 2631 5.6nF 7705 BC858 1 2 3 TP65 1 . 3790 91R 2829 0.1uF + 2641 100uF/16V 3660 22K(10K) 3626 3.3K + 2651 100uF/16V 2633 5.6nF 2639 0.1uF 3634 3.3K TP3 1 . TP4 1 . 2624 2.2nF/10% 2628 33pF/10% 3663 5.6K TP18 1 . 2612 33nF/10% 6603 1N4148 1 2 3644 13K 2614 1nF/10% 2619 1nF/10% 2642 NM 3658 5.6K 2613 1nF/10% 3666 NM(10K) 3661 5.6K 3675 0R(1R) 6602 1N4148 1 2 7733 10uH 2632 5.6nF 3794 0R 3655 5.6K 3664 11K 2826 0.1uF 3617 0R 2620 1nF/10% 2652 2.7nF 3635 22K + 2630 4.7uF/16V 2653 NM(100pF) 3665 NM(10K) 3641 9.1K 2824 0.1uF 2662 0.1uF 3657 5.1K(0R) 2617 1nF/10% 2636 22nF/10% 2622 0.1uF 3791 91R 2655 0.1uF 3646 220R 2618 1nF/10% 3636 22K 3642 11R 3633 1.3K 2625 2.2nF/10% 2635 6.8nF/10% GND SPINDLE_PWM 3139 243 3177 DVP4000MKI EN 12 3139 785 3172x DVP4000MKI 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 D D C C B B A A SMALL BOARD LED KEY1 RC OPEN/CLOSE STBY LED KEY1 KEY2 RC STBY GND VCC KEY2 VCC VCC VCC VCC VCC VCC VCC TP8 1 . 3402 2.2K TP3 1 . 1409 HEADER8 1 2 3 4 5 6 7 8 3409 10K 7402 BC847 1 2 3 3401 2.2K 7401 BC847 1 2 3 3405 10K 3407 47R TP4 1 . 2402 100pF 6403 6403 1 2 3 IR GND VCC 2403 100P 6402 LED 1 2 6401 LED 1 2 1402 SW_KEY2 TP5 1 . 6405 1N4148 1 2 + 2400 10uF/16V TP6 1 . 1405 HEADER2 1 2 1406 HEADER2 1 2 3408 10K 3403 470R 3412 1K TP1 1 . 3404 470R 6406 1N4148 1 2 TP7 1 . TP2 1 . 3406 1K 2401 0.1uF 3411 1K 1407 POWER 1 3 5 2 4 6 1+ 2+ 3+ 1- 2- 3- 3413 10K 3410 120R 1401 SW_KEY1 3139 243 3176 Front Board Circuit Diagram EN 15 3139 785 3172x 7610 7603 1609 16 Mbit SDRAM 4 Mbit FLASH 2-CH AUDIO DAC CS4345 ANALOG VIDEO OUTPUT CVBS/Y/C/Y/Pb/Pr 7609 1606 ZR36762 SERVO AND MPEG DECODER 7601 RF AMPLFIER ZR36707 7604 7605 MOTOR DRIVER BA5954 MOTOR DRIVER BA6208 RECEIVER POWER BUTTON 2x LEDs Door Locking Switch 1405 MPEG BOARD POWER SUPPLY LOADER MODULE KHM-310AHC FRONT BOARD 1006 DVP4000MKII DVP4000MKII Block Diagram EN 16 3139 785 3172x Wiring Diagram DVP4000MKII EN 17 3139 785 3172x Mono Board Circuit Diagram 1 5 5 4 4 3 3 2 2 1 1 D D C C B B A A MEMAD15 MEMRD- MEMAD14 MEMAD13 MEMAD12 MEMAD11 MEMAD10 MEMAD9 MEMAD8 DSPVCC33# MEMAD20 RESET- MEMAD19 MEMAD18 MEMAD17 MEMAD7 MEMAD6 MEMAD5 MEMAD4 MEMAD3 MEMAD2 MEMAD1 MEMAD16 MEMDA15 MEMDA7 MEMDA14 MEMDA6 MEMDA13 MEMDA5 MEMDA12 MEMDA4 MEMDA11 MEMDA3 MEMDA10 MEMDA2 MEMDA9 MEMDA1 MEMDA8 MEMDA0 MEMRD- FLASHCS- MEMAD0 DSPVCC33# MEMWR- MEMWR- MEMDA[15:0] MEMAD[20:0] I2CDAT I2CCLK MEMCS0- MEMCS1- SSRAMCS- FLASHCS- DSPVCC33# MEMDA0 DSPVCC33# MEMDA1 GND MEMAD0 MEMDA3 MEMDA5 MEMDA7 MEMDA2 MEMDA4 MEMDA6 MEMAD16 MEMAD3 MEMAD1 GND MEMAD5 MEMAD7 MEMAD10 MEMAD12 MEMAD18 MEMAD8 GND MEMAD14 IMEMAD19 AMEMAD19 DSPVCC33# SSRAMCS- MEMDA8 MEMDA10 MEMDA9 MEMDA11 MEMRD- MEMDA12 MEMDA15 MEMDA13 GND MEMDA14 MEMAD4 MEMAD19 MEMAD2 MEMAD17 MEMAD6 MEMWR- MEMAD13 MEMAD15 MEMAD11 MEMAD9 DSPVCC33 DSPVCC33# DSPVCC33# DSPVCC33# MEMDA[15:0] MEMAD[20:0] RESET DSPVCC33 MEMCS0- MEMCS1- I2CCLK I2CDAT MEMRD- MEMWR- Remove JP5 and install 3727 with 0R resistor for MP Flash speed <= 70 nS EXTERNAL SRAM PORT JP1 : a)Flash memory(U5) : 1-3 short only b)External SRAM( J16) : 1-2 and 3-4 short EXTERNAL SRAM PORT A19 NC NC RY/BY# BYTE# A0 1 A1 2 A2 3 GND 4 VCC 8 WP 7 SCL 6 SDA 5 7611 NM/24C02 7611 NM/24C02 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 1628 NM 1628 NM A15 1 A14 2 A13 3 A12 4 A11 5 A10 6 A9 7 A8 8 NC 9 A20 10 WE# 11 RP# 12 VPP 13 WP# 14 A19 15 A18 16 A17 17 A7 18 A6 19 A5 20 A4 21 A3 22 A2 23 A1 24 A16 48 VCCQ 47 GND 46 DQ15 45 DQ7 44 DQ14 43 DQ6 42 DQ13 41 DQ5 40 DQ12 39 DQ4 38 VCC 37 DQ11 36 DQ3 35 DQ10 34 DQ2 33 DQ9 32 DQ1 31 DQ8 30 DQ0 29 OE# 28 GND 27 CE# 26 A0 25 7610 39VF400A 7610 39VF400A 3729 NM/4.7K 3729 NM/4.7K 3725 0R 3725 0R 2833 0.1uF 2833 0.1uF 3727 0R 3727 0R 2700 NM/0.1uF 2700 NM/0.1uF 3726 NM 3726 NM 3730 NM/4.7K 3730 NM/4.7K 3 4 1 2 1611 NM 1611 NM + 2830 47uF/16V + 2830 47uF/16V 3728 NM 3728 NM 5630 FB220R 5630 FB220R d98bpv12_862_ 060105_pg2 DVP4000MKII EN 18 3139 785 3172x 5 5 4 4 3 3 2 2 1 1 D D C C B B A A CTR_STBY DSPVCC33 CTR_STBY CVBS_C/OUT# VCC33 Y_R_V/OUT# VCC33 DSPVCC18 +2.5V C_B_U_OUT# C_B_U_OUT# CTR_STBY STB COAX_SPDIF D+5V +3.2V CVBS_G_Y/OUT# +5VD CVBS_C/OUT# Y_R_V/OUT# SPDIF CTR_STBY CVBS_G_Y/OUT# GND COAX_SPDIF GND SERVO33 DSPVCC33 SGND VGND AFEGND RFGND D+5V DSPVCC18 A+12V VCC33 DSPVCC33 D+5V VCC33 D+5V VCC33 VCC33 VCC33 D+5V A+5VL D+5V M5V RFA5V A+5VL M5V DSPVCC33 CVBS_C/OUT Y_R_V/OUT CVBS_G_Y/OUT C_B_U/OUT DUPTD0 DUPTD1 DUPRD0 DUPRD1 SPDIF STB OP/CL IRRCV STOP STBY LED PLAY MAIN_L MAIN_R SERVO33 DSPVCC33 DSPVCC18 DOWN_LOAD_I/F SW DEBUG Low = Standby 3776 220R 3776 220R 3769 1K 3769 1K 1 2 6604 1N4148 6604 1N4148 1 2 3 4 1604 NM 1604 NM 5616 FB220R 5616 FB220R 1 2 6617 1N4003 6617 1N4003 3782 220R 3782 220R 3748 47K 3748 47K 3767 15K 3767 15K . 1 TP57 TP57 1 2 TP50 TEST POINT TP50 TEST POINT 5606 FB75R 5606 FB75R 1 2 6605 1N4148 6605 1N4148 1 2 6618 1N4003 6618 1N4003 . 1 TP72 TP72 . 1 TP30 TP30 1 2 3 4 1631 NM 1631 NM 3770 NM 3770 NM 2 1 3 7725 PSS8050 7725 PSS8050 1 2 TP51 TEST POINT TP51 TEST POINT 5613 FB220R 5613 FB220R . 1 TP73 TP73 . 1 TP33 TP33 3733 NM 3733 NM 1 2 + 2711 47uF/16V + 2711 47uF/16V 2643 1nF 2643 1nF . 1 TP39 TP39 3743 91R 3743 91R 3781 220R 3781 220R . 1 TP74 TP74 1 2 + 2713 220uF/16V + 2713 220uF/16V 1 2 + 2707 47uF/16V + 2707 47uF/16V 2844 0.1uF 2844 0.1uF 1 2 6611 1N4148 6611 1N4148 . 1 TP40 TP40 . 1 TP75 TP75 5608 FB75R 5608 FB75R 3749 4.7K 3749 4.7K . 1 TP45 TP45 3771 33R 3771 33R 3774 33R/1% 3774 33R/1% . 1 TP41 TP41 . 1 TP76 TP76 1 2 6610 1N4148 6610 1N4148 . 1 TP46 TP46 2703 0.1uF 2703 0.1uF . 1 TP42 TP42 . 1 TP47 TP47 3780 220R 3780 220R 3775 120R/1% 3775 120R/1% 3 1 2 7722 SI2301BDS 7722 SI2301BDS . 1 TP43 TP43 5610 FB75R 5610 FB75R 1 2 3 7726 BC848 7726 BC848 2705 0.1uF 2705 0.1uF 1 2 3 4 5 6 7 8 1608 TO VFD 1608 TO VFD 2645 1nF 2645 1nF 1 2 + 2715 100uF/16V + 2715 100uF/16V . 1 TP48 TP48 2740 1nF 2740 1nF 5607 FB75R 5607 FB75R 1 2 6613 1N4148 6613 1N4148 3740 NM 3740 NM . 1 MARK3 MARK3 . 1 TP49 TP49 1 2 3 7715 BC858 7715 BC858 . 1 MARK4 MARK4 + 2834 100uF/16V + 2834 100uF/16V . 1 TP52 TP52 1 2 + 2853 10uF/16V + 2853 10uF/16V 6616 9.1V 6616 9.1V 3777 220R 3777 220R 2739 1nF 2739 1nF 5 1 6 8 7 3 9 10 2 4 11 1606 VIDEO OUT 1606 VIDEO OUT 2 1 3 7723 PSS8050 7723 PSS8050 1 2 6615 1N4148 6615 1N4148 1 2 + 2712 220uF/16V + 2712 220uF/16V 3742 68R 3742 68R . 1 TP53 TP53 1 5 3 4 6 2 7 8 1614 AUDIO OUT 1614 AUDIO OUT Ref 1 A 2 C 3 7614 TL431 7614 TL431 5614 FB220R 5614 FB220R 1 2 6614 1N4148 6614 1N4148 . 1 TP54 TP54 3 1 2 7714 SI2301BDS 7714 SI2301BDS 1 2 + 2722 100uF/16V + 2722 100uF/16V . 1 MARK6 MARK6 . 1 TP55 TP55 3772 3.3K 3772 3.3K 1 2 + 2709 47uF/16V + 2709 47uF/16V 1 2 6612 1N4148 6612 1N4148 3741 150R 3741 150R 2738 1nF 2738 1nF 2698 0.1uF 2698 0.1uF 3773 12K 3773 12K 3768 1K 3768 1K 2836 0.1uF 2836 0.1uF . 1 TP44 TP44 1 2 + 2839 100uF/16V + 2839 100uF/16V . 1 TP58 TP58 . 1 TP71 TP71 . 1 TP70 TP70 3779 470R 3779 470R 1 2 3 7721 BC848 7721 BC848 2837 0.1uF 2837 0.1uF 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 H1 H1 H1 H1 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 H2 H2 H2 H2 . 1 MARK5 MARK5 3721 100R 3721 100R 2675 1nF 2675 1nF 5628 FB220R 5628 FB220R 1 2 3 4 1601 Power 1601 Power 5609 FB220R 5609 FB220R 2704 11pF 2704 11pF 3783 220R 3783 220R 3739 33R 3739 33R d98bpv12_862_ 060105_pg3 DVP4000MKII Mono Board Circuit Diagram 2 EN 19 3139 785 3172x 5 5 4 4 3 3 2 2 1 1 D D C C B B A A VQ+ VQ+ MUTE MUTE AOUTR AOUTL AOUT0# AOUT0 ABCLK# AMCLK# ABCLK AMCLK ALRCLK# ALRCLK A+12V AOUTR AOUTL MUTE VQ+ MUTER MUTEL A12V A+12V D+5V A+12V A12V A+12V MAIN_L MAIN_R CVBS_G_Y Y_R_V C_B_U CVBS_C CVBS_C/OUT C_B_U/OUT CVBS_G_Y/OUT Y_R_V/OUT AMCLK AOUT0 ABCLK ALRCLK AMUTE HIGH--MUTE LOW--OPERATE NOTICE:WHEN LAYOUT,78L05 NEAR 2684 3715 NM 3715 NM 3 2 1 8 4 + - 7606A JRC4558 + - 7606A JRC4558 1 2 2667 47uF/16V 2667 47uF/16V 2672 100pF 2672 100pF 1 2 3 7712 BC848 7712 BC848 3762 33R 3762 33R 2858 1nF 2858 1nF 3713 2K 3713 2K 2691 11pF 2691 11pF 2686 160pF 2686 160pF 3796 10K 3796 10K 3681 10K 3681 10K 3786 10K 3786 10K 1 2 2677 22uF/16V 2677 22uF/16V 3682 18K 3682 18K 1 2 3 7727 BC858 7727 BC858 3763 33R 3763 33R 3716 4.7K 3716 4.7K 2684 47uF/16V 2684 47uF/16V 2861 0.1uF 2861 0.1uF 2685 150pF 2685 150pF 1 2 3 7710 BC848 7710 BC848 2664 100pF 2664 100pF 3700 330R 3700 330R 1 2 6609 1N4148 6609 1N4148 3707 10K 3707 10K 2683 0.1uF 2683 0.1uF 2697 160pF 2697 160pF 1 2 6608 1N4148 6608 1N4148 1 2 2678 47uF/16V 2678 47uF/16V 1 2 2665 22uF/16V 2665 22uF/16V 3701 10K 3701 10K 1 2 3 7724 BC858 7724 BC858 2696 150pF 2696 150pF 3797 100R 3797 100R 3709 470R 3709 470R . 1 TP80 TP80 1 2 6640 1N4148 6640 1N4148 7730 1.1uH 7730 1.1uH 2673 0.1uF 2673 0.1uF 5 6 7 8 4 + - 7606B JRC4558 + - 7606B JRC4558 1 2 2674 22uF/16V 2674 22uF/16V 2694 160pF 2694 160pF + 2840 220uF/16V + 2840 220uF/16V 2682 11pF 2682 11pF 2693 150pF 2693 150pF 2671 0.1uF 2671 0.1uF 3684 330R 3684 330R AOUTL 10 VQ 5 SCLK 2 DATA 1 VA 9 LRCK 3 AOUTR 7 AGND 8 FILT+ 6 MCLK 4 7609 CS4345 7609 CS4345 3723 NM 3723 NM 1 2 + 2669 220uF/16V + 2669 220uF/16V 3693 3.3K 3693 3.3K 3703 47K 3703 47K 3710 33R 3710 33R 2687 11pF 2687 11pF 1 2 6641 1N4148 6641 1N4148 3724 NM 3724 NM 3711 33R 3711 33R 3687 10K 3687 10K 3691 18K 3691 18K 3717 33K 3717 33K 2668 1nF 2668 1nF 7729 1.1uH 7729 1.1uH 3719 NM 3719 NM 3689 470R 3689 470R 3702 47K 3702 47K + 2831 47uF/16V + 2831 47uF/16V 3690 10K 3690 10K 2679 1nF 2679 1nF 3683 3.3K 3683 3.3K 7731 1.1uH 7731 1.1uH 2688 150pF 2688 150pF 1 2 3 7711 BC848 7711 BC848 + 2692 220uF/16V + 2692 220uF/16V + 2832 220uF/16V + 2832 220uF/16V 1 2 2666 22uF/16V 2666 22uF/16V 7732 1.1uH 7732 1.1uH 2695 11pF 2695 11pF 2680 0.1uF 2680 0.1uF + 2838 47uF/16V + 2838 47uF/16V OUT 1 GND 2 IN 3 7608 78L05 7608 78L05 1 2 2859 47uF/16V 2859 47uF/16V 3761 33R 3761 33R 2857 1nF 2857 1nF 3714 4.7K 3714 4.7K 2689 160pF 2689 160pF d98bpv12_862_ 060105_pg4 Mono Board Circuit Diagram 3 DVP4000MKII EN 20 3139 785 3172x 5 5 4 4 3 3 2 2 1 1 D D C C B B A A PDIC_SEL PDIC_SEL DRVSB PDIC_SEL GND CDLD FACT- FACT+ TACT+ TACT- VREF SLED_S FOCUS_S OPU5V RFB RFD RFD REF MD DRVSB TRACK_S SPINDLE_S HOMESW DVDLD RF RFF GND VC RFC RFA VR_DVD TACT+ MOT_SPDL_ FACT- FACT+ SLED+ SLED- TACT- MOT_SPDL+ SPINDLE_S SPDL_SENS+ PDIC_SEL RFD SLED- SLED+ MOT_SPDL+ MOT_SPDL_ VR_CD GND GND DSPVCC33 AFEGND VGND SGND RFGND SERVO33 RFA5V DSPVCC33 RFA5V M5V MGND MGND MGND M5V SGND RFGND MGND MGND SERVO33 DSPVCC33 DSPVCC33 SERVO33 MGND FOCUS_S SLED_S HOMESW MD_CD MD_DVD CD/DVD DRVSB SPINDLE_S TRACK_S GND DSPVCC33 RFF RFE RF VC CD_LD DVD_LD RFA RFB RFD RFC FOCUS_S SLED_S SPINDLE_S SPDL_SENS+ TRACK_S DRVSB SERVO33 HOMESW 2005.06.12 2005.06.12 Not assemble in MP model TOP 2 E 1 B 3 C 2.1V S8550 CD_DVD : CD=LOW DVD=HIGH Close to opu connector 3402 3.3K 3402 3.3K 3434 4.7K 3434 4.7K 3401 3.3K 3401 3.3K . 1 TP64 TP64 3409 100R 3409 100R . 1 TP21 TP21 . 1 TP65 TP65 . 1 TP10 TP10 2417 0.1uF 2417 0.1uF . 1 TP23 TP23 . 1 TP11 TP11 3403 4.7k 3403 4.7k 1 2 3 7405 BC858 7405 BC858 . 1 TP24 TP24 3404 3.3K 3404 3.3K + 2409 100uF/16V + 2409 100uF/16V . 1 TP12 TP12 3425 0R 3425 0R 1 2 3 4 5 6 1712 TO DRIVE 1712 TO DRIVE GND-LD 24 DVD-LD 23 NC 22 HFM 21 MD 20 CD-LD 19 VR-DVD 18 VR-CD 17 NC 16 E 15 VCC 14 VC(VREF) 13 GND/PD 12 F 11 B 10 A 9 RF 8 CD/DVD_SW 7 D 6 C 5 T- 4 T+ 3 F+ 2 F- 1 GND 25 GND 26 1402 24Pin OPU connector 1402 24Pin OPU connector 2407 0.01uF 2407 0.01uF 2425 0.1uF 2425 0.1uF . 1 TP13 TP13 3433 NM 3433 NM 3442 2.2R 3442 2.2R 3431 10K 3431 10K 3429 100R 3429 100R 1 2 3 7406 BC858 7406 BC858 3440 470R 1% 3440 470R 1% 3436 10K 3436 10K 2415 0.1uF 2415 0.1uF . 1 TP14 TP14 1 2 3 7403 BC848 7403 BC848 + 2411 47uF/16V + 2411 47uF/16V 3411 220R 3411 220R 3441 0R 3441 0R . 1 TP1 TP1 3427 100R 3427 100R + 2416 47uF/16V + 2416 47uF/16V + 2410 47uF/16V + 2410 47uF/16V . 1 TP3 TP3 2431 220uF/16V 2431 220uF/16V 3410 2.2R 3410 2.2R 3405 470R 3405 470R 3413 2.2R 3413 2.2R 2414 1nF 2414 1nF . 1 TP2 TP2 3435 33R 3435 33R 1 2 3 7411 BC858 7411 BC858 3437 10K 3437 10K . 1 TP4 TP4 3400 0R 3400 0R 3426 1K 3426 1K 2408 0.01uF 2408 0.01uF 3407 0R 3407 0R . 1 TP15 TP15 . 1 TP5 TP5 2424 0.1uF 2424 0.1uF 1 2 3 7404 BC848 7404 BC848 2405 0.1uF 2405 0.1uF . 1 TP6 TP6 1 2 3 7410 BC858 7410 BC858 2733 10nF 2733 10nF VINFC 1 OP2IN- 2 OP2IN+ 3 VINSL 4 OP2OUT 5 FWD 6 REV 7 VCC 8 VOTR- 9 VOTR+ 10 VOSL- 11 VOSL+ 12 VOFC- 13 VOFC+ 14 STBY 28 BIAS 27 VINTK 26 OP1IN+ 25 OP1IN- 24 VINLD 23 PREGND 22 VCTL 21 OP1OUT 20 VCC2 19 VOLD- 18 VOLD+ 17 VOTK- 16 VOTK+ 15 GND 29 GND 30 7605 AM5868S 7605 AM5868S . 1 TP18 TP18 3412 220R 3412 220R . 1 TP7 TP7 1 2 3 7402 BC848 7402 BC848 2413 1nF 2413 1nF . 1 TP19 TP19 3406 NM 3406 NM . 1 TP61 TP61 . 1 TP8 TP8 2406 10nF 2406 10nF . 1 TP62 TP62 . 1 TP17 TP17 3408 100R 3408 100R 3423 470R 1% 3423 470R 1% . 1 TP63 TP63 . 1 TP9 TP9 2412 10nF 2412 10nF . 1 TP20 TP20 d98bpv12_862_ 060105_pg5 Mono Board Circuit Diagram 4 DVP4000MKII EN 21 3139 785 3172x DVP4000MKII 5 5 4 4 3 3 2 2 1 1 D D C C B B A A 1 8 N I P Z 1 8 N I P Z 9 7 N I P Z 9 7 N I P Z ZPIN81 ZPIN79 E F A D D V D N G 3 1 A D M E M 1 D A M E M RAMDAT14 5 A D M E M 0 D A M E M 2 1 A D M E M RAMDAT1 - 1 S C M E M S _ S U C O F S _ K C A R T 9 1 D A M E M C S C A D D D V 0 D R P U D 1 D T P U D 3 3 C C V P S D 8 1 C C V P S D S _ D E L S S _ E L D N I P S RAMDAT15 - R W M E M RAMDAT0 RAMADD4 1 1 A D M E M N I C S O T U O C S O 4 A D M E M RAMADD3 3 A D M E M RAMADD5 V C R R I RAMADD10 0 1 A D M E M RAMADD2 2 A D M E M 8 1 D A M E M RAMADD6 5 1 D A M E M 6 1 D A M E M RAMADD1 RAMDAT8 PCLK 7 1 D A M E M RAMADD7 RAMDAT7 IPCLK 9 A D M E M RAMDAT9 4 1 D A M E M RAMADD0 I M N U P C 7 D A M E M 3 1 D A M E M RAMDAT6 1 A D M E M 2 1 D A M E M RAMDAT10 6 D A M E M RFINP RAMADD9 RAMDAT5 RFINN 5 1 A D M E M RAMADD8 8 A D M E M M W P _ E L D N I P S M W P _ D E L S M W P _ S U C O F 1 1 D A M E M RAMDAT11 0 A D M E M 5 D A M E M RAMWE- 7 A D M E M 0 1 D A M E M A D D V RAMDAT4 RAMCAS- RAMDAT12 RAMRAS- 4 D A M E M 4 1 A D M E M RAMDAT3 9 D A M E M - D R M E M RAMDAT13 3 D A M E M RAMBA 6 A D M E M RFA 2 D A M E M RAMDAT2 RAMCS0- RFB - T E S E R 8 D A M E M RFC RFD - 0 S C M E M DRVSB RAMDQM RFINP RFA RFB RFC RFD 0 D T P U D 1 D R P U D RFE RFF CD_LD DVD_LD T U O C S O N I C S O RAMCS0- RAMBA RAMRAS- RAMCAS- RAMWE- RAMDQM RAMADD4 RAMADD5 RAMADD6 RAMADD7 RAMADD8 RAMADD9 PCLK RAMDQM RAMDAT8 RAMDAT9 RAMDAT10 RAMDAT11 RAMDAT12 RAMDAT13 RAMDAT14 RAMDAT15 RAMDAT7 RAMDAT6 RAMDAT5 RAMDAT4 RAMDAT3 RAMDAT2 F33V RAMDAT0 RAMDAT1 RAMADD3 RAMADD2 RAMADD1 RAMADD0 RAMADD10 STB 9 7 N I P Z 1 8 N I P Z SPDL_SENS+ SPDL_SENS+ W S N I 0 2 D A M E M E K C M A R D N G 3 3 C C V P S D D N G E F A D N G V D N G S D N G F R 3 3 C C V P S D 3 3 C C V P S D 3 3 C C V P S D 8 1 C C V P S D 3 3 C C V P S D 3 3 C C V P S D 3 3 C C V P S D 8 1 C C V P S D 8 1 C C V P S D 3 3 C C V P S D 3 3 C C V P S D 3 3 C C V P S D 3 3 C C V P S D S _ S U C O F CD/DVD F I D P S S _ K C A R T S _ E L D N I P S RFA RFB RFC RFD S _ D E L S RFE RFF HOMESW VC T E S E R - 1 S C M E M - R W M E M - D R M E M - 0 S C M E M ] 0 : 0 2 [ D A M E M V C R R I 8 1 C C V P S D F R MD_DVD MD_CD CD_LD DVD_LD ] 0 : 5 1 [ A D M E M C _ S B V C Y _ G _ S B V C V _ R _ Y U _ B _ C 3 3 C C V P S D 0 T U O A DRVSB 1 D T P U D 1 D R P U D 0 D R P U D 0 D T P U D DSPVCC33 K L C B A K L C R L A K L C M A K L C C 2 I T A D C 2 I E T U M A SPDL_SENS+ B T S Y A L P P O T S Y B T S OP/CL LED : s g n i t t e s 4 0 2 1 , 3 0 2 1 f f o s p m u J l l A : e d o m y a l P ) 1 y l n o t r o h s 2 - 1 s 4 0 2 1 : e d o m d a o l n w o D ) 2 y l n o t r o h s 2 - 1 s ' 3 0 2 1 : e d o m g u b e D W S ) 3 p i h c o t e s o l c d l u o h s r o t s i s e r R 5 7 = w o L y b d n a t S R 0 2 2 B F 3 0 2 5 R 0 2 2 B F 3 0 2 5 P 2 . 2 6 5 2 2 P 2 . 2 6 5 2 2 2 2 2 2 F p 3 3 2 2 2 2 F p 3 3 7 3 2 3 % 1 R 5 7 7 3 2 3 % 1 R 5 7 5 1 2 3 ) K 1 ( M N 5 1 2 3 ) K 1 ( M N + 0 7 2 2 V 6 1 / F u 7 4 + 0 7 2 2 V 6 1 / F u 7 4 7 5 2 2 F u 1 . 0 7 5 2 2 F u 1 . 0 1 3 2 3 R 3 3 1 3 2 3 R 3 3 1 2 8 4 1 4 L L 1 1 2 6 8 4 1 4 L L 1 1 2 6 2644 0.1uF 2644 0.1uF 6 0 2 2 F n 1 6 0 2 2 F n 1 2 3 1 1 0 2 6 M N 1 0 2 6 M N + 5 1 2 2 V 6 1 / F u 7 4 + 5 1 2 2 V 6 1 / F u 7 4 2 6 2 2 F u 1 . 0 2 6 2 2 F u 1 . 0 0 6 2 3 K 7 . 4 0 6 2 3 K 7 . 4 + V 6 1 / F u 1 9 6 2 2 + V 6 1 / F u 1 9 6 2 2 K 7 . 4 0 1 2 3 K 7 . 4 0 1 2 3 0 4 2 3 R 3 3 0 4 2 3 R 3 3 4 5 2 2 F n 0 1 4 5 2 2 F n 0 1 1 7 2 2 F u 1 . 0 1 7 2 2 F u 1 . 0 . 1 6 5 P T 6 5 P T 0 3 2 2 F p 3 3 0 3 2 2 F p 3 3 1 2 3 0 2 1 2 L E S T O O B 3 0 2 1 2 L E S T O O B 7 6 2 2 F u 1 . 0 7 6 2 2 F u 1 . 0 0 8 2 2 F n 0 1 0 8 2 2 F n 0 1 4 2 2 2 F p 3 3 4 2 2 2 F p 3 3 6 2 2 2 F p 3 3 6 2 2 2 F p 3 3 4 1 8 2 F u 1 . 0 4 1 8 2 F u 1 . 0 1 4 2 3 R 3 3 1 4 2 3 R 3 3 0 5 2 3 % 1 R 5 7 0 5 2 3 % 1 R 5 7 2209 0.1uF 2209 0.1uF 2 3 1 2 0 2 6 M N 2 0 2 6 M N 9 1 2 3 K 7 . 4 9 1 2 3 K 7 . 4 VDD 1 DQ0 2 DQ1 3 VSSQ 4 DQ2 5 DQ3 6 VDDQ 7 DQ4 8 DQ5 9 VSSQ 10 DQ6 11 DQ7 12 VDDQ 13 LDQM 14 WE 15 CAS 16 RAS 17 CS 18 BA 19 A10/AP 20 A0 21 A1 22 A2 23 A3 24 VDD 25 VSS 50 DQ15 49 DQ14 48 VSSQ 47 DQ13 46 DQ12 45 VDDQ 44 DQ11 43 DQ10 42 VSSQ 41 DQ9 40 DQ8 39 VDDQ 38 NC 37 UDQM 36 CLK 35 CKE 34 NC 33 A9 32 A8 31 A7 30 A6 29 A5 28 A4 27 VSS 26 3 0 6 7 0 7 L / C T - 0 0 1 6 1 S 2 4 C I 3 0 6 7 0 7 L / C T - 0 0 1 6 1 S 2 4 C I + 9 3 2 2 V 6 1 / F u 0 0 1 + 9 3 2 2 V 6 1 / F u 0 0 1 2 7 8 2 P 3 3 2 7 8 2 P 3 3 3 2 2 2 F p 3 3 3 2 2 2 F p 3 3 4 4 2 2 F u 1 . 0 4 4 2 2 F u 1 . 0 K 5 1 6 0 2 3 K 5 1 6 0 2 3 9 9 2 2 M N 9 9 2 2 M N . 1 7 K R A M 7 K R A M 2 0 2 5 R 0 2 2 B F 2 0 2 5 R 0 2 2 B F 5 6 2 2 F u 1 . 0 5 6 2 2 F u 1 . 0 1 2 4 0 2 1 1 L E S T O O B 4 0 2 1 1 L E S T O O B 7 4 8 2 F u 1 . 0 7 4 8 2 F u 1 . 0 7 2 2 2 F p 3 3 7 2 2 2 F p 3 3 3 4 1 2 2 1 6 1 H C T I W S 2 1 6 1 H C T I W S 8 3 2 2 F u 1 . 0 8 3 2 2 F u 1 . 0 1 6 2 2 F u 1 . 0 1 6 2 2 F u 1 . 0 3 7 8 2 P 3 3 3 7 8 2 P 3 3 3 1 8 2 F u 1 . 0 3 1 8 2 F u 1 . 0 8 4 2 3 % 1 R 5 7 8 4 2 3 % 1 R 5 7 . 1 1 H P 1 H P 3 4 2 2 F u 1 . 0 3 4 2 2 F u 1 . 0 K 0 3 5 0 2 3 K 0 3 5 0 2 3 . 1 2 K R A M 2 K R A M + 6 3 2 2 V 6 1 / F u 0 2 2 + 6 3 2 2 V 6 1 / F u 0 2 2 5 3 2 2 F p 3 3 5 3 2 2 F p 3 3 3 1 2 3 R 5 7 3 1 2 3 R 5 7 8 4 8 2 F u 1 . 0 8 4 8 2 F u 1 . 0 3203 20K 1% 3203 20K 1% 4 6 2 2 F u 1 . 0 4 6 2 2 F u 1 . 0 6 1 8 2 F u 1 . 0 6 1 8 2 F u 1 . 0 . 1 1 K R A M 1 K R A M 4 7 8 2 P 3 3 4 7 8 2 P 3 3 1 2 5 0 2 1 M N 5 0 2 1 M N 7 0 2 2 F n 7 2 7 0 2 2 F n 7 2 5 1 8 2 F u 1 . 0 5 1 8 2 F u 1 . 0 2 0 2 2 F p 7 2 2 0 2 2 F p 7 2 0 0 6 3 K 0 1 0 0 6 3 K 0 1 9 4 2 3 % 1 R 5 7 9 4 2 3 % 1 R 5 7 3 5 2 2 F n 0 1 3 5 2 2 F n 0 1 7 3 2 2 F u 1 . 0 7 3 2 2 F u 1 . 0 6 1 2 3 K 7 . 4 6 1 2 3 K 7 . 4 + 0 4 2 2 V 6 1 / F u 0 0 1 + 0 4 2 2 V 6 1 / F u 0 0 1 2 7 2 2 F u 1 . 0 2 7 2 2 F u 1 . 0 6 1 2 2 M N 6 1 2 2 M N 3 6 2 2 F u 1 . 0 3 6 2 2 F u 1 . 0 2 0 2 3 K 0 2 2 2 0 2 3 K 0 2 2 K 1 5 4 0 2 3 K 1 5 4 0 2 3 R 0 0 2 6 3 R 0 0 2 6 3 R 0 2 2 B F 1 0 2 5 R 0 2 2 B F 1 0 2 5 8 1 2 2 F n 1 8 1 2 2 F n 1 8 0 2 2 F n 2 2 8 0 2 2 F n 2 2 . 1 8 K R A M 8 K R A M 7 0 2 5 R 0 2 2 B F 7 0 2 5 R 0 2 2 B F K 3 4 7 0 2 3 K 3 4 7 0 2 3 + 0 1 6 2 V 6 1 / F u 7 4 + 0 1 6 2 V 6 1 / F u 7 4 1 5 2 2 F n 0 1 1 5 2 2 F n 0 1 7 1 2 3 K 7 . 4 7 1 2 3 K 7 . 4 K 0 0 1 8 0 2 3 K 0 0 1 8 0 2 3 1 0 2 3 R 5 7 1 0 2 3 R 5 7 9 1 2 2 F u 1 . 0 9 1 2 2 F u 1 . 0 8 4 2 2 F u 1 . 0 8 4 2 2 F u 1 . 0 1 2 2 0 2 1 n o tt u b I M N 2 0 2 1 n o tt u b I M N 2 3 2 2 F p 3 3 2 3 2 2 F p 3 3 0 5 2 2 F u 1 . 0 0 5 2 2 F u 1 . 0 2 5 2 2 F n 0 1 2 5 2 2 F n 0 1 5 0 2 2 F n 1 5 0 2 2 F n 1 8 6 2 2 F u 1 . 0 8 6 2 2 F u 1 . 0 3 0 2 2 F p 7 2 3 0 2 2 F p 7 2 1 3 6 5 R 0 2 2 B F 1 3 6 5 R 0 2 2 B F 5 3 2 3 % 1 R 5 7 5 3 2 3 % 1 R 5 7 . 1 7 3 P T 7 3 P T 2 4 2 2 F u 1 . 0 2 4 2 2 F u 1 . 0 4 1 2 3 ) K 1 ( M N 4 1 2 3 ) K 1 ( M N 3 3 2 2 F p 3 3 3 3 2 2 F p 3 3 1 3 2 2 F p 3 3 1 3 2 2 F p 3 3 7 1 2 2 F n 1 7 1 2 2 F n 1 GPCIO[16]/SSCTXD 208 GPCIO[47]/SSCCLK 207 GPCIO[38]/DUPTD1 206 GPCIO[37]/DUPRD1 205 GPCIO[36]/DUPTD0 204 GPCIO[35]/DUPRD0 203 GPCIO[41]/PWMCO[0] 202 IDGPCIO[4]/PWMCO[6] 201 GPCIO[46]/PWMCO[5] 200 VDDPWM 199 GPCIO[45]/PWMCO[4] 198 GNDPWM 197 GPCIO[44]/PWMCO[3] 196 GPCIO[43]/PWMCO[2] 195 IDGPCIO[7]/SPINDLEPULSE 194 IDGPCIO[6]/SLEDPULSE 193 VDD-IP 192 ICGPCIO[7] 191 ICGPCIO[6] 190 GNDP 189 IDGPCIO[3] 188 VDDP 187 ICGPCIO[5] 186 ICGPCIO[4] 185 GNDC 184 GPCIO[32] 183 VDDC 182 CD_LD 178 CD_MD 176 DVD_LD 179 DVD_MD 177 VBGAP 174 RESOUT 175 VC 173 AGNDREF 180 AGND1 181 AVDD1 161 F 172 SVDD 163 E 170 K 171 D 167 J 168 C 165 H 166 B 162 G 159 A 160 AGND 169 AVDD 164 RFN 158 RFP 157 ] 7 1 [ O I C P G / D X R C S S 1 ] 8 1 [ O I C P G /] 1 [ # S C M E M 2 P D D V 3 ] 5 1 [ D A M E M 4 ] 6 1 [ D A M E M 5 ] 4 1 [ D A M E M 6 ] 3 1 [ D A M E M 7 A G F C L L P /] 2 1 [ D A M E M 8 ] 5 1 [ A D M E M 9 P G F C L L P /] 1 1 [ D A M E M 0 1 ] 7 [ A D M E M 1 1 P D N G 2 1 ] 0 1 [ D A M E M 3 1 ] 4 1 [ A D M E M 4 1 ] 9 [ D A M E M 5 1 ] 6 [ A D M E M 6 1 ] 8 [ D A M E M 7 1 ] 3 1 [ A D M E M 8 1 ] 5 [ A D M E M 9 1 ] 2 [ # S C M E M /] 9 1 [ O I C P G /] 0 2 [ D A M E M 0 2 P D D V 1 2 ] 2 1 [ A D M E M 2 2 # R W M E M 3 2 ] 4 [ A D M E M 4 2 C D D V 5 2 ] 1 1 [ A D M E M 6 2 ] 3 [ A D M E M 7 2 L E S L L P /] 9 1 [ D A M E M 8 2 C D N G 9 2 ] 0 1 [ A D M E M 0 3 ] 8 1 [ D A M E M 1 3 P D N G 2 3 ] 2 [ A D M E M 3 3 ] 7 1 [ D A M E M 4 3 ] 9 [ A D M E M 5 3 ] 7 [ D A M E M 6 3 ] 1 [ A D M E M 7 3 ] 6 [ D A M E M 8 3 ] 8 [ A D M E M 9 3 ] 5 [ D A M E M 0 4 P D D V 1 4 ] 0 [ A D M E M 2 4 ] 4 [ D A M E M 3 4 # D R M E M 4 4 ] 3 [ D A M E M 5 4 ] 2 [ D A M E M 6 4 ] 0 [ # S C M E M 7 4 2 L E S T O O B /] 1 [ D A M E M 8 4 1 L E S T O O B /] 0 [ D A M E M 9 4 P D N G 0 5 P I- D D V 1 5 P D D V 2 5 RAMADD[4] 53 RAMADD[3] 54 RAMADD[5] 55 RAMADD[2] 56 RAMADD[6] 57 VDDP 58 RAMADD[1] 59 RAMADD[7] 60 RAMADD[0] 61 GNDP 62 RAMADD[8] 63 VDDC 64 RAMADD[10] 65 GNDC 66 RAMADD[9] 67 VDDP 68 RAMADD[11] 69 RAMCS#[0]/RAMBA1 70 RAMBA[0] 71 GNDP 72 RAMCS#[1] 73 RAMRAS# 74 RAMCAS# 75 VDDP 76 RAMWE# 77 RAMDQM 78 GNDPCLK 79 PCLK 80 VDDPCLK 81 RAMDAT[8] 82 GNDP 83 RAMDAT[7] 84 RAMDAT[9] 85 RAMDAT[6] 86 VDDP 87 RAMDAT[10] 88 RAMDAT[5] 89 RAMDAT[11] 90 GNDP 91 RAMDAT[4] 92 VDDC 93 RAMDAT[12] 94 GNDC 95 RAMDAT[3] 96 VDDP 97 RAMDAT[13] 98 RAMDAT[2] 99 RAMDAT[14] 100 GNDP 101 RAMDAT[1] 102 RAMDAT[15] 103 RAMDAT[0] 104 2 S B C A D D N G 6 5 1 P C A D D N G 5 5 1 T E S R 4 5 1 U / B / C 3 5 1 C A D D D V 2 5 1 V / R / Y 1 5 1 C / S B V C 0 5 1 C A D D D V 9 4 1 Y / G / S B V C 8 4 1 C / Y 7 4 1 D C A D D N G 6 4 1 D C A D D N G 5 4 1 K L C G 4 4 1 O X 3 4 1 A D D V 2 4 1 # T E S E R 1 4 1 A D N G 0 4 1 P D N G 9 3 1 D D V 8 3 1 ] 2 [ O I C P G D I 7 3 1 ] 1 3 [ O I C P G 6 3 1 ] 0 [ D I V /] 3 [ O I C P G C I/ K C T J D 5 3 1 ] 1 [ D I V /] 0 3 [ O I C P G / O D T J D 4 3 1 ] 2 [ D I V /] 9 2 [ O I C P G /I D T J D 3 3 1 ] 3 [ D I V /] 8 2 [ O I C P G / S M T J D 2 3 1 C D D V 1 3 1 C D N G 0 3 1 ] 4 [ D I V /] 7 2 [ O I C P G / K C T E C I/ 2 K C T J D 9 2 1 ] 5 [ D I V /] 1 [ O I C P G D I/ O D T E C I/ 2 O D T J D 8 2 1 ] 6 [ D I V /] 2 [ O I C P G C I/I D T E C I/ 2 I D T J D 7 2 1 ] 7 [ D I V /] 6 2 [ O I C P G / S M T E C I/ 2 S M T J D 6 2 1 P D D V 5 2 1 2 x K L C V /] 1 [ O I C P G C I/ S M T J C / C N Y S O C 4 2 1 P D N G 3 2 1 C N Y S H /] 5 2 [ O I C P G / O D T J C 2 2 1 C N Y S V /] 4 2 [ O I C P G /I D T J C 1 2 1 N I A /] 3 2 [ O I C P G / K C T J C 0 2 1 2 A - P D D V 9 1 1 K L C M A 8 1 1 2 A - P D N G 7 1 1 K L C B A 6 1 1 K L C R L A 5 1 1 O I A P G 4 1 1 ] 0 [ T U O A 3 1 1 ] 1 [ T U O A /] 2 2 [ O I C P G 2 1 1 ] 2 [ T U O A /] 1 2 [ O I C P G 1 1 1 F I D P S 0 1 1 ] 0 [ O I C P G D I 9 0 1 ] 0 [ O I C P G C I 8 0 1 P D N G 7 0 1 ] 0 2 [ O I C P G /I M N U P C 6 0 1 P D D V 5 0 1 A 4 0 2 7 2 8 8 / 2 6 8 6 3 R Z A 4 0 2 7 2 8 8 / 2 6 8 6 3 R Z R 0 2 2 B F 5 0 2 5 R 0 2 2 B F 5 0 2 5 4 3 2 2 F p 3 3 4 3 2 2 F p 3 3 6 6 2 2 F u 1 . 0 6 6 2 2 F u 1 . 0 5 5 2 2 F n 0 1 5 5 2 2 F n 0 1 % 1 R 2 9 3 9 0 2 3 % 1 R 2 9 3 9 0 2 3 HOLE12 220 1 E L O H 9 0 2 2 E L O H 0 1 2 3 E L O H 1 1 2 4 E L O H 2 1 2 5 E L O H 3 1 2 6 E L O H 4 1 2 7 E L O H 5 1 2 8 E L O H 6 1 2 9 E L O H 7 1 2 0 1 E L O H 8 1 2 1 1 E L O H 9 1 2 HOLE13 221 HOLE14 222 HOLE15 223 HOLE16 224 HOLE17 225 HOLE18 226 HOLE35 243 HOLE36 244 HOLE37 245 HOLE38 246 HOLE39 247 HOLE49 257 HOLE19 227 HOLE20 228 HOLE21 229 HOLE22 230 HOLE23 231 HOLE44 252 HOLE43 251 HOLE42 250 HOLE41 249 HOLE40 248 HOLE48 256 HOLE47 255 HOLE46 254 HOLE45 253 4 3 E L O H 2 4 2 3 3 E L O H 1 4 2 2 3 E L O H 0 4 2 1 3 E L O H 9 3 2 0 3 E L O H 8 3 2 9 2 E L O H 7 3 2 8 2 E L O H 6 3 2 7 2 E L O H 5 3 2 6 2 E L O H 4 3 2 5 2 E L O H 3 3 2 4 2 E L O H 2 3 2 B 4 0 2 7 2 8 8 / 2 6 8 6 3 R Z B 4 0 2 7 2 8 8 / 2 6 8 6 3 R Z . 1 8 3 P T 8 3 P T 1 4 2 2 F u 1 . 0 1 4 2 2 F u 1 . 0 1 0 2 7 z H M 0 0 0 . 7 2 1 0 2 7 z H M 0 0 0 . 7 2 d98bpv12_862_060105_pg6.pdf Mono Board Circuit Diagram 5 EN 24 3139 785 3172x 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 D D C C B B A A SMALL BOARD LED KEY1 RC OPEN/CLOSE STBY LED KEY1 KEY2 RC STBY GND VCC KEY2 VCC VCC VCC VCC VCC VCC VCC TP8 1 . 3402 2.2K TP3 1 . 1409 HEADER8 1 2 3 4 5 6 7 8 3409 10K 7402 BC847 1 2 3 3401 2.2K 7401 BC847 1 2 3 3405 10K 3407 47R TP4 1 . 2402 100pF 6403 6403 1 2 3 IR GND VCC 2403 100P 6402 LED 1 2 6401 LED 1 2 1402 SW_KEY2 TP5 1 . 6405 1N4148 1 2 + 2400 10uF/16V TP6 1 . 1405 HEADER2 1 2 1406 HEADER2 1 2 3408 10K 3403 470R 3412 1K TP1 1 . 3404 470R 6406 1N4148 1 2 TP7 1 . TP2 1 . 3406 1K 2401 0.1uF 3411 1K 1407 POWER 1 3 5 2 4 6 1+ 2+ 3+ 1- 2- 3- 3413 10K 3410 120R 1401 SW_KEY1 3139 243 3176 DVP4000MKII Front Board Circuit Diagram
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