| content |
'SERVICE MANUAL
DATA
DVD PLAYER
XD-DV370
S/M Code No. 09-009-349-9N1
HR(N) EZ(N, B) K(N)
U(B)
DP2[6721R-0308A](HR/K/U)
DP3[6721R-0309A](EZ)
BASIC DVD/CD MECHANISM :
If requiring information about the ELECTRICAL ADJUSTMENT & MECHANSIM
ADJUSTMENT & MECHANISM PARTS LOCATION <EZ> & MECHANISM DISASSEMBLY
<EZ> & FL GRID ASSINGMENT/ANODE CONNECTION/PIN CONNECTION.
see Supplement Service manual of XD-DV370(HR/U/K/EZ) (S/M Code No. 09-00C-349-9S1)
<HR(N)>
<Except for HR(N)>
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-2-
TABLE OF CONTENTS
SPECIFICATIONS ........................................................................................................................................................................... 3
PROTECTION OF EYES FROM LASER BEAM DURING SERVING ............................................................................................ 4
ACCESSORIES LIST ...................................................................................................................................................................... 5
DISASSEMBLY INSTRUCTIONS ............................................................................................................................................. 6 ~ 7
ELECTRICAL MAIN PARTS LIST ...........................................................................................................................................8 ~ 10
TRANSISTOR ILLUSTRATION ..................................................................................................................................................... 11
BLOCK DIAGRAM - 1 (OVERALL) <HR> ..................................................................................................................................... 12
BLOCK DIAGRAM - 2 (OVERALL) <Except HR> ......................................................................................................................... 13
BLOCK DIAGRAM - 3 (POWER) <U> .......................................................................................................................................... 14
BLOCK DIAGRAM - 4 (POWER) <Except U> .............................................................................................................................. 15
BLOCK DIAGRAM - 5 (RF/CD DSP/DVD SERVO) ...................................................................................................................... 16
BLOCK DIAGRAM - 6 (AUDIO) .................................................................................................................................................... 17
BLOCK DIAGRAM - 7 (MPEG) <HR> ........................................................................................................................................... 18
BLOCK DIAGRAM - 8 (MPEG) <Except HR> ............................................................................................................................... 19
BLOCK DIAGRAM - 9 (µ-COM) .................................................................................................................................................... 20
BLOCK DIAGRAM - 10 (KARAOKE) <HR> .................................................................................................................................. 21
WIRE HARNESS DIAGRAM ......................................................................................................................................................... 22
SCHEMATIC DIAGRAM - 1 (MAIN - 1/5, AUDIO SECTION) ........................................................................................................ 23
SCHEMATIC DIAGRAM - 2 (MAIN - 2/5, DRIVE & RF SECTION) ............................................................................................... 24
SCHEMATIC DIAGRAM - 3 (MAIN - 3/5, DVD DSP SECTION) ................................................................................................... 25
SCHEMATIC DIAGRAM - 4 (MAIN - 4/5, MPEG SECTION) <HR> .............................................................................................. 26
SCHEMATIC DIAGRAM - 5 (MAIN - 4/5, MPEG SECTION) <Except HR> .................................................................................. 27
SCHEMATIC DIAGRAM - 6 (MAIN - 5/5, MAIN µ-COM SECTION) ............................................................................................. 28
SCHEMATIC DIAGRAM - 7 (INTERFACE - 1/3, TIMER SECTION) (KEY1, KEY2 SECTION) <HR> ......................................... 31
SCHEMATIC DIAGRAM - 8 (INTERFACE - 1/3, TIMER SECTION) (KEY1, KEY2 SECTION) <Except HR> ............................. 32
SCHEMATIC DIAGRAM - 9 (INTERFACE - 2/3, JACK SECTION) <HR> ................................................................................... 33
SCHEMATIC DIAGRAM - 10 (INTERFACE - 2/3, JACK SECTION) <U> .................................................................................... 34
SCHEMATIC DIAGRAM - 11 (INTERFACE - 2/3, JACK SECTION) <EZ, K>............................................................................... 35
SCHEMATIC DIAGRAM - 12 (INTERFACE - 3/3, POWER SECTION) <U> ................................................................................ 36
SCHEMATIC DIAGRAM - 13 (INTERFACE - 3/3, POWER SECTION) <Except U> .................................................................... 37
WIRING - 1 (MAIN C.B) <HR> ...................................................................................................................................................... 29
WIRING - 2 (MAIN C.B) <Except HR> .......................................................................................................................................... 30
WIRING - 3 (INTERFACE C.B) <HR> ........................................................................................................................................... 38
WIRING - 4 (INTERFACE C.B) <U> ............................................................................................................................................. 39
WIRING - 5 (INTERFACE C.B) <EZ, K> ....................................................................................................................................... 40
WIRING - 6 (KEY1, KEY2 C.B) ..................................................................................................................................................... 41
WAVEFORMS .......................................................................................................................................................................42 ~ 43
IC BLOCK DIAGRAM ............................................................................................................................................................44 ~ 45
IC DESCRIPTION .................................................................................................................................................................46 ~ 67
MECHANICAL EXPLODED VIEW 1/1 .......................................................................................................................................... 68
MECHANICAL MAIN PARTS LIST 1/1 ......................................................................................................................................... 69
COLOR NAME TABLE .................................................................................................................................................................. 70
DVD MECHANISM EXPLODED VIEW 1/1 ................................................................................................................................... 71
DVD MECHANISM MAIN PARTS LIST 1/1................................................................................................................................... 72
ELECTRICAL TROUBLESHOOTING GUIDE .......................................................................................................................73 ~ 83
DVD MECHANISM PARTS LOCATION <Except EZ> .................................................................................................................. 84
DVD MECHANISM DISASSEMBLY <Except EZ> ................................................................................................................85 ~ 87
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SPECIFICATIONS
230 V AC, 50 Hz <K>
Power supply
110 - 240 V AC, 50/60 Hz <HR, EZ>
Power consumption
16 W
Weight
3.2 kg
External dimensions 430 × 88 × 245 mm (w × h × d)
Laser
Semicounductor laser,
wave length 650/750 nm
Signal format
PAL/NTSC
Supported discs
DVD video discs
12 cm (single-sided single-layer,
single-sided
double-layer,
double-sided-double layer)
8 cm (single-sided single-layer,
single-sided
double-layer,
double-sided-double layer)
Compact discs (CD-DA, video CD)
12 cm and 8 cm discs
S video output
Y output: 1 Vp-p (75 ohms, sync
negative)
C output: 0.286 Vp-p
1 Mini DIN 4 pin
Video output
Video composite output
1 Vp-p (75 ohms, sync negative)
1 RCA jack
1 Scart connector
Audio output
Digital output
0.5 Vp-p (75 ohms)
1 Fiber optical connector
1 RCA jack
Analogue output
2.0 Vrms (1kHz, 0dB, 330
ohms)
1 RCA jacks (L/R)
Audio output characteristics
Signal to noise ratio
More than 105 dB (EIAJ)
Dynamic range
More than 95 dB (EIAJ)
Harmonic distortion
0.003%
Frequency range:
CD / VCD: 2 Hz to 20 kHz
DVD: 2Hz to 22kHz (48kHz
sampling)
2Hz to 44kHz (96kHz
sampling)
Wow and flutter: unmeasurable
Operating conditions
Manufactured under license from Dolby
Laboratories. Dolby , Pro Logic and the double-
D symbol are trademarks of Dolby Laboratories.
Confidential unpublished works. c1992-1997 Dolby
Laboratories. All rights reserved.
Manufactured under license from Digital Theater
Systems, Ino. US Pat. No. 5,451,942 and other
worldwide patents issued and pending. DTS and
DTS Digital Surround are trademarks of Digital
Theater Systems, Inc. c1996 Digital Theater
systems, Ino. All rights reserved.
Spatializer¤ 3-D Stereo, Spatializer N-2-2 (TM)
and the circle-in-square device are trademarks
owned by Desper Products, Inc,.
Power supply
120 V AC, 60 Hz
Power consumption
16 W
Weight
3.2 kg (7.1 lbs)
External dimensions 430 × 88 × 245 mm (w × h × d)
(17× 3.5 × 9.9 inches)
Signal format
NTSC
Supported discs
DVD video discs
12 cm (single-sided single-layer,
single-sided
double-layer,
double-sided-double layer)
8 cm (single-sided single-layer,
single-sided
double-layer,
double-sided-double layer)
Compact discs (CD-DA, video CD)
12 cm and 8 cm discs
S video output
Y output: 1 Vp-p (75 ohms, sync
negative)
C output: 0.286 Vp-p
1 Mini Din 4 pin
Video output
Video composite output
1 Vp-p (75 ohms, sync negative)
1 RCA jack
Video component output
Y output: 1 Vp-p (75 ohms, sync
negative)
1 RCA jack
PB,PR output: 0.7 Vp-p (75 ohms)
1 RCA jacks (PB,PR)
Video component output <HR>
Y output: 1 Vp-p (75 ohms, sync
negative)
1 RCA jack
PB,PR output: 0.7 Vp-p (75 ohms)
1 RCA jacks (PB,PR)
Audio output
Digital output
0.5 Vp-p (75 ohms)
1 Fiber optical connector
Analog output
2.0 Vrms (1kHz, 0dB, 330
ohms)
2 RCA jacks (L/R)
Audio output characteristics
Signal to noise ratio
More than 105 dB (EIAJ)
Dynamic range
More than 95 dB (EIAJ)
Harmonic distortion
0.003%
Frequency range:
CD / VCD: 2 Hz to 20 kHz
DVD: 2Hz to 22kHz (48kHz
sampling)
2Hz to 44kHz (96kHz
sampling)
Wow and flutter: unmeasurable
Operating conditions
<HR, EZ, K MODELS>
<U MODEL>
Design and specifications are subject to change without notice.
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PROTECTION OF EYES FROM LASER BEAM DURING SERVICING
This set employs laser. Therefore, be sure to follow carefully the
instructions below when servicing.
WARNING!
WHEN SERVICING, DO NOT APPROACH THE LASER
EXIT WITH THE EYE TOO CLOSELY. IN CASE IT IS
NECESSARY TO CONFIRM LASER BEAM EMISSION.
BE SURE TO OBSERVE FROM A DISTANCE OF MORE
THAN 30cm FROM THE SURFACE OF THE OBJECTIVE
LENS ON THE OPTICAL PICK-UP BLOCK.
Caution: Invisible laser radiation when
open and interlocks defeated avoid
exposure to beam.
Advarsel:
VAROITUS!
VARNING!
CAUTION
Use of controls or adjustments or performance of proce-
dures other than those specified herin may result in
hazardous radiation exposure.
ATTENTION
ADVARSEL!
This Compact Disc player is classified as a CLASS 1
LASER product.
The CLASS 1 LASER PRODUCT label is located on the
rear exterior.
CLASS 1
LASER PRODUCT
KLASSE 1
LASER PRODUKT
LUOKAN 1
LASER LAITE
KLASS 1
LASER APPARAT
Body or clothes electrostatic potential could
ruin laser diode in the optical block. Be sure
ground body and workbench, and use care
the clothes do not touch the diode.
1) After the connection, remove solder
shown in the figures below.
Precaution to replace Optical block
Solder short for
DVD laser diode
Solder short for
CD laser diode
(SPU3140)
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REF. NO
PART NO.
KANRI
DESCRIPTION
NO.
ACCESSORIES LIST
1 S8-35R-S00-12X INSTRUCTION ASSY<HRN>
1 S8-35R-S00-12W INSTRUCTION ASSY<UB>
1 S8-35R-S00-12V INSTRUCTION ASSY<KN>
1 S8-35R-S00-12Z INSTRUCTION ASSY<EZB,EZN>
2 S7-11R-2N0-13F REMOTE CONTROLLER ASSY<HRN>
2 S7-11R-2N0-13D REMOTE CONTROLLER ASSY<UB,EZB>
2 S7-11R-2N0-13E REMOTE CONTROLLER ASSY<KN,EZN>
3 S5-640-17B-000 PLUG ASSY PHONE CORD 1WAY
3 S5-640-18B-000 PLUG ASSY PHONO CORD
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Top Case
(A)
(A)
(A)
(A)
(A)
(A)
(A)
Tray Door
Disc Tray
Front Panel
Stopper
Stopper
(B)
(B)
CABINET DISASSEMBLY
1. Top Case
1. Release 7 screws (A). (See Fig. 2-1)
2. Lift the top case with holding the back of it,
and remove it in the direction of the arrow
Fig. 2-1
Fig. 2-2
Fig. 2-3
3. Front Panel
1. Eject the disc tray. (See Fig. 2-2)
2. Remove the tray door. (See Fig. 2-2)
3. Release 2 screws (B).
4. Pull the front panel toward you while pressing
7 stoppers to disengage, and remove the front
panel. (See Fig. 2-3)
2.Tray Door
1.Eject the disc tray.
2.Lift up the tray door in the direction of the
arrow.
DISASSEMBLY -1/2
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DISASSEMBLY -2/2
PMD02
P
P5901
PMD04
(C)
(C)
(C)
(C)
(C)
(C)
(C)
(C)
(C)
(C)
(C)
(C)
(D)
(D)
Main Cir
DVD Mechansm
Power Code
Interface
Board
Key1
Circuit Board
Key2
Circuit Board
(E)
(E)
(E)
(E)
Fig. 2-4
Fig. 2-5
1. Disassembling of Main Circuit Board
and Interface Board
1. Remove the top case.(See Fig. 2-1)
2. Remove 12 screw (C).
3. Remove FF-cable (PMD02, PMD04), and
remove the DVD MECHANISM.
4. Remove 2 connector (P3901, P5901) and
remove Main Circuit Board from Interface Board.
5. Remove 2 screw (D).
6. Remove Interface Board from the chassis.
CIRCUIT BOARD DISASSEMBLY
2. Key1 and Key2 Circuit Board
1. Remove the front panel.(See Fig. 2-3)
2. Release 4 screws (E), and remove the Key1, 2
circuit board.
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-8-
ELECTRICAL MAIN PARTS LIST - 1/3
REF. NO
PART NO.
KANRI
DESCRIPTION
NO.
REF. NO
PART NO.
KANRI
DESCRIPTION
NO.
IC
!
!
!
!
!
SI-SK6-153-00A IC,STR-G6153T 5P<EXCEPT U>
S2-309-024-040 SENSORLTV-817B PHOTO COU
SI-SS4-310-00A IC,KA431AZ
SI-SS7-808-00H IC,KA78R08 4P
SI-SH3-130-00B IC,PQ3RD13
SI-HY2-580-10B IC,GDC25D801C
SI-JR3-414-00C IC,NJM3414AM-TE1,3K/REEL
87-017-856-080 IC,TC4W53FU
SI-GL4-411-64A IC,GLT441L16-40
SI-TI3-337-21A IC,SSI33P3721
SI-FA3-032-00A IC,KA3032
SI-CU3-000-00A IC,ZIVA3-PE0<HR>
SI-CU4-100-00A IC,ZIVA4.1<EXCEPT HR>
SI-GS7-216-16C ICGM72V161621ET-7
SI-BB1-700-00A IC,PLL1700E 20P
SI-PH7-128-00A IC,SAA7128<HR>
87-A21-254-040 IC,BA7660FS<HR>
SI-SH2-050-00A IC,PQ20WZ5U 20WZ51
SI-SA7-135-00A IC,LA7135A<EXCEPT HR>
SI-BB1-716-00A IC,PCM1716E 28P
SI-JR4-580-00B IC,NJM4580M
SI-TO7-040-00F IC,TC7W04FU
SI-CB5-331-00A IC,CS5331A-KS<HR>
SI-HI6-417-03B IC,HD6417034AFI20
SI-AL4-981-92B IC,AT49F8192A-90TC
SI-MQ5-316-25A IC,V53C16256HK50
SI-SS2-402-10A IC,KS24C021CS
SI-TI7-437-40K IC,SN74AHC374PWLE
SI-XL9-536-15B IC,XC9536-15VQ44C-PROG
SI-RH3-308-00A IC,BA3308<HR>
SI-KE4-558-00A IC,KIA4558P<HR>
SI-SA8-661-12C IC,LC866112B-5N21
87-001-196-010 IC,KIA7042P
TRANSISTOR
!
!
!
!
!
ST-R44-190-0AA TR,KTC4419<U>
ST-R31-980-9AC TR,KTC3198-TP-BL
ST-R11-510-0AA TR,KSB1151-Y
ST-R10-370-9BB C-TR,2SA1037K-Q
87-A30-273-040 TR,DTC124EK
89-324-122-080 TR,2SC2412KR
ST-R15-040-9BF TR,KTA1504S-Y<EXCEPT HR>
ST-R15-050-9AD TR,KTA1505S-Y
ST-R10-000-9BM TR,UMZ1N 3K
87-026-609-080 TR,KTA1266-GR
ST-R10-300-9AE TR,KRC103M<K,EZ>
ST-R10-500-9AB TR,KRC105M
ST-R10-500-9AD TR,KRA105M
DIODE
87-A40-284-080 DIODE,ERA22-10<EXCEPT U>
SD-D22-060-9AA DIODE,ERA22-06<U>
SD-D01-000-9AC DIODE,EU01W
87-020-465-080 DIODE,1SS133
SD-R10-400-9AB DIODE,RL104
87-017-352-010 DIODE,RU3YXLF-C1 100V2
SD-R18-020-9AA DIODE,ERA18-02KFRB
SD-R10-451-0AA DIODE,B10A45V1
SD-R15-402-0BA DIODE,1N5402
SD-R10-400-0AA DIODE,RZ1040<U>
87-020-331-080 DIODE,DAN202K
MAIN C.B
C232 SC-H71-06C-611 C-CAP,10UF-6.3V
C271 SC-H71-06C-611 C-CAP,10UF-6.3V
C272 SC-H84-76C-611 C-CAP,47UF-6.3V
C274 SC-H84-76C-611 C-CAP,47UF-6.3V
C275 SC-H71-06C-611 C-CAP,10UF-6.3V
C276 SC-H71-06C-611 C-CAP,10UF-6.3V
C278 SC-H71-06C-611 C-CAP,10UF-6.3V
C279 SC-H71-06C-611 C-CAP,10UF-6.3V
C280 SC-H71-06C-611 C-CAP,10UF-6.3V
C281 SC-H71-06C-611 C-CAP,10UF-6.3V
C284 SC-H84-76C-611 C-CAP,47UF-6.3V
C2D1 SC-H84-76C-611 C-CAP,47UF-6.3V
C2D2 SC-H84-76C-611 C-CAP,47UF-6.3V
C2D3 SC-H84-76C-611 C-CAP,47UF-6.3V
C2D4 SC-H84-76C-611 C-CAP,47UF-6.3V
C2D5 SC-H71-06C-611 C-CAP,10UF-6.3V
C2M1 SC-H81-07F-611 C-CAP,100UF-16V
C340 SC-H71-06C-611 C-CAP,10UF-6.3V
C361 SC-H81-07F-611 C-CAP,100UF-16V<HR>
C362 87-A12-114-080 C-CAP,TN 22UF-6.3V<HR>
C363 SC-H81-07F-611 C-CAP,100UF-16V<HR>
C364 87-A12-114-080 C-CAP,TN 22UF-6.3V<HR>
C367 SC-H81-07F-611 C-CAP,100UF-16V<HR>
C368 87-A12-114-080 C-CAP,TN 22UF-6.3V<HR>
C369 SC-H81-07F-611 C-CAP,100UF-16V<HR>
C370 87-A12-114-080 C-CAP,TN 22UF-6.3V<HR>
C371 SC-H81-07F-611 C-CAP,100UF-16V<HR>
C372 87-A12-114-080 C-CAP,TN 22UF-6.3V<HR>
C375 SC-H81-07F-611 C-CAP,100UF-16V<EXCEPT HR>
C382 SC-H84-76C-611 C-CAP,47UF-6.3V<EXCEPT HR>
C383 SC-H84-76C-611 C-CAP,47UF-6.3V<EXCEPT HR>
C384 SC-H84-76C-611 C-CAP,47UF-6.3V<EXCEPT HR>
C406 SC-H81-07F-611 C-CAP,100UF-16V
C407 SC-H84-76C-611 C-CAP,47UF-6.3V
C409 SC-H84-76C-611 C-CAP,47UF-6.3V
C410 SC-H84-76C-611 C-CAP,47UF-6.3V
C419 SC-H84-76C-611 C-CAP,47UF-6.3V
C421 SC-H84-76C-611 C-CAP,47UF-6.3V
C429 SC-H81-07F-611 C-CAP,100UF-16V
C430 SC-H81-07F-611 C-CAP,100UF-16V
C536 SC-H71-06F-621 C-CAP,10UF-16V
L201 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L202 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L203 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L204 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L207 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L208 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L211 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L2A1 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L2A2 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L301 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L302 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L303 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L304 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L305 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L306 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L307 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L308 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L309 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT<HR>
L371 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT<EXCEPT HR>
L401 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L402 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L4M1 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT<HR>
L501 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L502 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L503 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L505 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L506 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
L507 S2-00H-JC1-02A CER,FILTER HB-1M2012-102JT
P3901 S6-30R-BE0-340 CONN,BOAR2254-30S-T
P5502 S6-30H-XC1-15A CONN,04-6232-115-008-800
P5901 S6-30R-BE0-340 CONN,BOAR2254-30S-T
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-9-
PMD02 S6-30R-FB0-2W0 CONN,04-6232-123-008-80
PMD03 S6-30R-FB0-2H0 CONN,04-6232-108-008-800
PMD04 S6-30R-3S0-06F CONN,5P
X301 S2-02R-BL0-1A0 X\'TAL,HC-49/SM5H
X501 S2-12S-AML-CB0 RESONATOR CSTCV20.00MXJ040-TC
INTERFACE C.B
BC101 S6-360-04C-000 COIL,BFS3550R2FD8<EXCEPT U>
BD101 87-070-173-010 DIODE,S1WBA60
C100 87-010-408-040 CAP,E 47UF-50V<EXCEPT U>
!
!
!
!
!C101
S6-240-88F-000 CAP,PCX2 275V 0.1UF,M
!
!
!
!
!C102
S6-240-88F-000 CAP,PCX2 275V 0.1UF,M<EXCEPT U>
!
!
!
!
!C103
SC-E10-7CT-610 CAP,100UF-350V<U>
!
!
!
!
!C103
SC-E68-6CU-611 CAP,E 68UF-400V<EXCEPT U>
!
!
!
!
!C105
87-016-375-010 CAP,0.01UF-630V
!
!
!
!
!C106
S6-240-87B-000 CAP,100P-1KV
C111 87-010-403-040 CAP,E 3.3-50V<U>
!
!
!
!
!C114
87-012-379-010 CAP,3300PF-400V<EXCEPT U>
!
!
!
!
!C114
S6-240-86B-000 CAP,103-400V<U>
C116 87-010-387-010 CAP,E 470UF-25V KME
C118 87-010-112-080 CAP,E 100-16V
C119 87-010-408-040 CAP,E 47UF-50V
!
!
!
!
!C120
S6-240-86B-000 CAP,103-400V<U>
C121 SC-E22-76F-638 CAP,E 220UF-16V
!
!
!
!
!C122
SC-G33-10U-510 CAP,CER 330PF-400V<EXCEPT U>
C123 87-010-237-910 CAP,E 1000UF-16V
C124 87-010-237-910 CAP,E 1000UF-16V
C125 87-010-375-080 CAP,E 330-10V
C126 87-010-387-010 CAP,E 470UF-25V KME
C127 87-010-408-080 CAP,E 47-50V
C129 SC-E47-7CD-638 CAP,E 470UF-10V
C130 87-010-112-080 CAP,E 100-16V
C131 87-010-112-080 CAP,E 100-16V
C134 87-010-112-080 CAP,E 100-16V
C137 SC-E47-7CD-638 CAP,E 470UF-10V
C140 SC-E47-7CD-638 CAP,E 470UF-10V
C601 87-010-378-080 CAP,E 10-16V<EXCEPT HR>
C602 SC-E47-7CD-638 CAP,E 470UF-10V<EXCEPT HR>
C603 SC-E47-7CD-638 CAP,E 470UF-10V<EXCEPT HR>
C604 87-010-380-080 CAP,E 47-16V<K,EZ>
C663 SC-E47-7CD-638 CAP,E 470UF-10V<K,EZ>
C6Z1 SC-E47-7CD-638 CAP,E 470UF-10V<U>
C6Z2 SC-E47-7CD-638 CAP,E 470UF-10V<U>
C6Z3 SC-E47-7CD-638 CAP,E 470UF-10V<U>
C6Z4 SC-E47-7CD-638 CAP,E 470UF-10V<K,EZ>
C6Z5 SC-E47-7CD-638 CAP,E 470UF-10V<K,EZ>
C6Z6 SC-E47-7CD-638 CAP,E 470UF-10V<K,EZ>
C801 87-010-378-080 CAP,E 10-16V<HR>
C802 87-010-112-080 CAP,E 100-16V<HR>
C803 87-010-378-080 CAP,E 10-16V<HR>
C804 87-010-378-080 CAP,E 10-16V<HR>
C806 87-010-112-080 CAP,E 100-16V<HR>
C807 87-010-378-080 CAP,E 10-16V<HR>
C810 87-010-378-080 CAP,E 10-16V<HR>
C812 87-010-378-080 CAP,E 10-16V<HR>
C813 87-010-380-080 CAP,E 47-16V<HR>
C814 87-010-378-080 CAP,E 10-16V<HR>
C818 87-010-380-080 CAP,E 47-16V<HR>
C824 87-010-378-080 CAP,E 10-16V<HR>
C902 87-010-378-080 CAP,E 10-16V
C906 87-010-408-080 CAP,E 47-50V
C907 87-010-378-080 CAP,E 10-16V
C912 87-010-380-080 CAP,E 47-16V
C913 87-010-380-080 CAP,E 47-16V
C914 87-010-380-080 CAP,E 47-16V
DIG901 S3-02R-V10-3A0 DIGITRON 7-BT-273GN
!
!
!
!
!F101
S5-850-11T-000 FUSE,1600MA 250V<EXCEPT U>
!
!
!
!
!F101
S5-850-27B-000 FUSE,1600MA 250V<U>
!
!
!
!
!F102
87-001-196-010 ICP-N10 T104<EXCEPT U>
F602 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<EXCEPT HR>
F603 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF
F604 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF
F605 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<EXCEPT HR>
F606 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<EXCEPT HR>
F607 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<EXCEPT HR>
F608 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<U>
F609 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<U>
F610 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<U>
F611 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F612 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<EXCEPT HR>
F613 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<EXCEPT HR>
F614 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F615 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F616 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F617 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F618 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F619 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F620 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F621 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F622 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<K,EZ>
F801 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<HR>
F802 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<HR>
F803 S2-00H-JC9-01A SAM,FILTER CFI06B1H101MF<HR>
!
!
!
!
!FH101 S5-860-08B-000 HOLDER,FUSE CLIP
!
!
!
!
!FH102 S5-860-08B-000 HOLDER,FUSE CLIP
JK601 S6-12R-L00-1A0 TOTX178 HORIZONTA JK
JK602 S6-12R-C00-6G0 JACK,RCA<HR,U>
JK602 S6-12R-C00-6H0 JACK,RCA<K,EZ>
JK603 S6-20R-M00-02B SOCKET 1F-21P<K,EZ>
!
!
!
!
!L101 S6-161-45E-000 FILTER KSE-145E<U>
L101 S6-161-45H-000 FILTER SHT LFS2020V4-04350<EXCEPT U>
L102 S6-330-88G-000 COIL,CHOCK TP 5MM
L103 S6-330-88D-000 COIL,20UH
L602 87-005-208-080 COIL,100<K,EZ>
L902 87-005-208-080 COIL,100
LED901 SD-L32-531-9AA LED SPR325MVWT31(GRN)
MJ801 S6-12R-B00-3A0 JACK,HEADPHONE<HR>
MJ802 S6-12R-B00-3A0 JACK,HEADPHONE<HR>
P6401 S6-30R-BE0-240 CONN,BOAR2254-30P-T
P9501 S6-30R-BE0-240 CONN,BOAR2254-30P-T
P9902 S5-617-11D-000 CONN,GIL-S-04P-S2T2-EF
P9904 S5-617-11L-000 CONN,12P
!
!
!
!
!PW101
S5-612-92B-000 GP390 LGC 3P STRAIG P
!
!
!
!
!R101
S6-140-07A-000 RES,CEM 2.7/2W
!
!
!
!
!R102
SR-S10-03K-619 RES,100K-2W<EXCEPT U>
!
!
!
!
!R104
SR-S33-02K-619 RES,M/F 33K-2W<U>
!
!
!
!
!R104
SR-S56-02K-619 RES,56K-2W<EXCEPT U>
R110 SR-S12-00J-619 RES,M/F 120-1W<U>
!
!
!
!
!R111
SR-S01-01K-619 RES,1-2W<U>
!
!
!
!
!R111
SR-S05-10K-619 RES,0.51-2W<EXCEPT U>
R122 SR-S12-00J-619 RES,M/F 120-1W
R144 SR-S12-00J-619 RES,M/F 120-1W<U>
RC901 S7-12R-193-8GA REMOTE CONTROLLER RECEI
SW601 S6-00R-SH0-3A0 SW,SLIDE SKQ-23D15-G3-NA<EXCEPT U>
!
!
!
!
!T101
S6-420-21G-000 KSE-021G KWANG SUNG NARRO<U>
!
!
!
!
!T101
S6-420-23T-000 PT,SHT-023T/KSE-023T<EXCEPT U>
!
!
!
!
!V101
S6-560-04C-000 V SVC681D-10A
VR801 S1-10R-RK0-3A0 VOLUME,ROTARY 20KB<HR>
VR802 S1-10R-RK0-3A0 VOLUME,ROTARY 20KB<HR>
VR803 S1-10R-RK0-3A0 VOLUME,ROTARY 20KB<HR>
X901 S6-160-20P-000 CSA6.00MGU MURATA 6MHZ
ZD101 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP
ZD102 SD-Z62-000-9BC ZENER,MTZJ6.2B<U>
ZD605 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP<EXCEPT HR>
ZD606 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP<EXCEPT HR>
ZD635 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP
ZD636 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP
ZD637 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP
ZD638 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP
REF. NO
PART NO.
KANRI
DESCRIPTION
NO.
REF. NO
PART NO.
KANRI
DESCRIPTION
NO.
ELECTRICAL MAIN PARTS LIST - 2/3
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-10-
ZD639 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP<K,EZ>
ZD640 SD-Z56-260-9AA ZENER,GDZJ5.6B 26MM TP<K,EZ>
KEY1 C.B
P9901 S5-636-02R-000 CONN,4P
SW901 S5-562-19B-000 SW,SKHV10910B
KEY2 C.B
P9903 S5-636-02S-000 CONN,12P
SW902 S5-562-19B-000 SW,SKHV10910B
SW903 S5-562-19B-000 SW,SKHV10910B
SW904 S5-562-19B-000 SW,SKHV10910B
SW905 S5-562-19B-000 SW,SKHV10910B
SW906 S5-562-19B-000 SW,SKHV10910B
SW907 S5-562-19B-000 SW,SKHV10910B
SW908 S5-562-19B-000 SW,SKHV10910B
SW910 S5-562-19B-000 SW,SKHV10910B
SW911 S5-562-19B-000 SW,SKHV10910B
SW912 S5-562-19B-000 SW,SKHV10910B
SW913 S5-562-19B-000 SW,SKHV10910B
SW914 S5-562-19B-000 SW,SKHV10910B
REF. NO
PART NO.
KANRI
DESCRIPTION
NO.
8 8
A
Resistor Code
Chip Resistor Part Coding
Figure
Value of resistor
Chip resistor
Wattage
Type
Tolerance
1/16W
1/10W
1/8W
1608
2125
3216
5%
5%
5%
CJ
CJ
CJ
Form
L
W
t
1.6
0.8
0.45
2
1.25
0.45
3.2
1.6
108
118
128
: A
: A
CHIP RESISTOR PART CODE
0.55
Resistor Code
Dimensions (mm)
Symbol
1/16W
1005
5%
CJ
1.0
0.5
0.35
104
L
t
W
•
Regarding connectors, they are not stocked as they are not the initial order items.
The connectors are available after they are supplied from connector manufacturers upon the order is received.
ELECTRICAL MAIN PARTS LIST - 3/3
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-11-
TRANSISTOR ILLUSTRATION
KTA1266
KTC3198
KTA1015
KTC103
KTC1015
KSB1151
KTC4419
E C B
E C B
E C B
B C E
2SA1037
2SC2412
DTC124EK
KTA1504
KTA1505
B
E
C
B2
E2
C2
B1
E1
C1
UMZ1N 3K
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Q
TEL 13942296513 QQ 376315150 892498299
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-12-
BLOCK DIAGRAM - 1 (OVERALL) <HR>
DISC
SPINDLE
MOTOR
LOADING
MOTOR
Focus, tracking sled
VF+
VF-
-24V
8V
5.2VA
5V_A
5V_D
3.3V_M
3.3V
2.5V
8V
A.GND,D.NGD,M.GND
loading drive
spindle
loading
CD,DVD:A,B,C,D,E,F
MIRR,TZC
DVD_LDQM,DVD_SD,CSI
DVD_MA[0:11]
DVD_MD[0:15]
DVD_SD_CAS,
DVD_SD_RAS
DVD_SD_CLK
DVD_MWE
DVD_DATA[0:7]
DVD_SD_CSO,
DVD_UDQM
ICADDR[0:8]
ICDATA[00:15]
SDCLKI, ZISENB
REQZI
3.38688MHz
DA_DATA,
DA_LRCK,
DA_BCK
D[00:07]
S_CLK,S_DATA,
DPLL_L
IIC_DATA,
IIC_CLK
A[00:02]
DA_XCK
CVBS,
Y,C
Y(G),
Pb(B)
Pr(R)
CVBS,Y,C
Y(G)Pb(B),Pr(R)
27MHz
FE,TE,RFRP,SBADD,DVD/CD RF
TEBAL,FEBAL,
DPOCTL,EQF,EQB
MON,SPINDLE_DRV
FDO,TDO,
FMO
AC100-
240V,
50~
60Hz
FL DISPLAY
KEY Input
SPINDLE_FG
POWER CONTROL
SENS,FOK,MIRR
MSDATO,DEFECT,DSP_SENSE,
SQSO,SQCK,SCOR,AO[0:5]
XLAT,S_CLK,S_DATA,DO[0:7]
PICK
UP
IC2A1
SSI33P3721
RF Signal
Processor
IC205
GLT441L16
DRAM
256K x 16bit
IC201
GDC25D801C
CD/DVD DSP
DVD SERVO
IC301
ZiVA3-P
MPEG A/V
Decoder
IC305
SAA7128
VIDEO
Encoder
IC304
PLL1700E
CLOCK
GENERATROR
IC2M1
KA3032
Motor Driver
OPEN S/W
CD DECK MECHANISM
CLOSE S/W
LIMIT S/W
M
M
DAC_LO,
S_CLK,
S_DATA
DA_DATA,
DA_LRCK,
DA_BCK
27MHz
X-TAL
L/R
VDATA[0:7]
Hsync
Vsync
IC306/307
BA7660FS
6dB AMP
AMP
L/R
CVBS
Y
C
Y(G) Pb(B) Pr(R)
IC401
PCM1716E
AUDIO
DAC
INTERFACE
BOARD
(POWER
SECTION)
IC901
LC866112B
-5N21
RC901
TSOP2838WE1
REMOCON
RECEIVER
IC501
HD6417034AFI20
MAIN
u-COM
VIDEO
OUT
AUDIO
OUT
IC302
GM72V161621ET-7
1M x 16bit
SDRAM
IC303
GM72V161621ET-7
1M x 16bit
SDRAM
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TEL 13942296513 QQ 376315150 892498299
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-13-
BLOCK DIAGRAM - 2 (OVERALL) <Except HR>
DISC
SPINDLE
MOTOR
LOADING
MOTOR
Focus, tracking sled
VF+
VF-
-24V
8V
5.2VA
5V_A
5V_D
3.3V_M
3.3V
2.5V
8V
A.GND,D.NGD,M.GND
loading drive
spindle
loading
CD,DVD:A,B,C,D,E,F
MIRR,TZC
DVD_LDQM,DVD_SD,CSI
DVD_MA[0:11]
DVD_MD[0:15]
DVD_SD_CAS,
DVD_SD_RAS
DVD_SD_CLK
DVD_MWE
DVD_DATA[0:7]
DVD_SD_CSO,
DVD_UDQM
ICADDR[0:8]
ICDATA[00:15]
SDCLKI, ZISENB
REQZI
3.38688MHz
DA_DATA,
DA_LRCK,
DA_BCK
D[00:07]
S_CLK,S_DATA,
DPLL_L
IIC_DATA,
IIC_CLK
A[00:02]
DA_XCK
Y.SEL
Y(G)
Pr(C,R)
Pb(B)
FE,TE,RFRP,SBADD,DVD/CD RF
TEBAL,FEBAL,
DPOCTL,EQF,EQB
MON,SPINDLE_DRV
FDO,TDO,
FMO
AC100-
240V,
50~
60Hz
FL DISPLAY
RC901
TSOP2838WE1
REMOCON
RECEIVER
KEY Input
SPINDLE_FG
POWER CONTROL
SENS,FOK,MIRR
MSDATO,DEFECT,DSP_SENSE,
SQSO,SQCK,SCOR,AO[0:5]
XLAT,S_CLK,S_DATA,DO[0:7]
PICK
UP
IC2A1
SSI33P3721
RF Signal
Processor
IC205
GLT441L16
DRAM
256K x 16bit
IC201
GDC25D801C
CD/DVD DSP
DVD SERVO
IC501
HD6417034AFI20
MAIN
u-COM
IC301
ZiVA4.1
MPEG A/V
Decoder
IC372
LA7135A
Switch IC
IC302
GM72V161621ET-7
1M x 16bit
SDRAM
IC303
GM72V161621ET-7
1M x 16bit
SDRAM
IC304
PLL1700E
CLOCK
GENERATROR
IC2M1
KA3032
Motor Driver
INTERFACE
BOARD
(POWER
SECTION)
IC901
LC866112B
-5N21
OPEN S/W
CD DECK MECHANISM
CLOSE S/W
LIMIT S/W
M
M
DAC_LO,
S_CLK,
S_DATA
DA_DATA,
DA_LRCK,
DA_BCK
27MHz
X-TAL
L/R
AMP
VIDEO
OUT
AUDIO
OUT
L/R
CVBS
Y
C
Y(G) Pb(B) Pr(R)
IC401
PCM1716E
AUDIO
DAC
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-14-
BLOCK DIAGRAM - 3 (POWER) <U>
RECTIFIER
BD101
LINE FILTER
L101
SWITCHING TR
Q101,Q102
TRANS
T101
AC INPUT
3,4
2
1
RECTIFIER(FLD)
D107,D108
RECTIFIER(14V)
D110
LPF
C120,C127,
L102
LPF
C116
REG(8V)
IC105
KA78R08
REG(3.3V)
IC106
PQ3RD13
REG(3.3V)
IC107
PQ3RD13
PWR CTL
VF+
VF-
-24VA
12VA
8V
5.2VA
5V_D
5V_A
3.3V
3.3V_M
2.5V
RECTIFIER(9V)
D106
RECTIFIER(5.2V)
D109
FEED B.
IC108
LTV-817B
LPF
C124,C125,
L103
Q107
D114
D113
11
13
9
5,7
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QQ 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-15-
BLOCK DIAGRAM - 4 (POWER) <Except U>
RECTIFIER(FLD)
D107,D108
RECTIFIER
BD101
LINE FILTER
L101
DRIVE & OVER
CURRENT LIMIT
IC101
STR-C6152T
RECTIFIER(14V)
D110
LPF
C120,C127,
L102
LPF
C116
REG(8V)
IC105
KA78R08
REG(3.3V)
IC106
PQ3RD13
REG(3.3V)
IC107
PQ3RD13
PWR CTL
VF+
VF-
-24VA
12VA
8V
5.2VA
5V_D
5V_A
3.3V
3.3V_M
2.5V
RECTIFIER(9V)
D106
RECTIFIER(5.2V)
D109
TRANS
T101
FEED B.
IC102
LTV-817B
AC INPUT
LPF
C124,C125,
L103
Q107
D114
D113
3,4
2
1
11
13
9
5,7
www . x ia o y u 1 6 3 . c o m
QQ 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-16-
BLOCK DIAGRAM - 5 (RF/CD DSP/DVD SERVO)
IC2A1
SSI33P3721
RF Signal
Processdr
IC201
GDC25D801C
CD/DVD DSP
DVD SERVO
IC205
DRAM
256K x 16bit
IC2M1
KA3032
SpindleMotor,LoadingMotor,
Actuator Driver
PICK
UP
DVD:A,B,C,D,
FE,TE,PI,SBADD
SENS,FOK,
MSDATO,DEFECT,DSP_SENSE
SQSO,SQCK
XLAT,S_CLK,S_DATA
DSP_CS,/WR,/RD
DO[0:7]
AO[0:5]
DVD_DATA[0:7]
MCK
To
MAIN u-COM
SECTION
To
MAIN u-COM
SECTION
To
MPEG
SECTION
M/D
DVD/CD RF
MIRR,TZC
ICADDR[0:8]
ICDATA[00:15]
MON,MDP
FDO,TDO,FMO
Spindle
focus,tracking,loading,sled
SPINDLE_FG
SPINDLE_FG
Load open/close(loading control)
CD:A,B,C,D/E,F
4
4
99,
101,
102,
103
70,78,
131,132,
134
114,118
80-82
175-177
30
162
170
129,
130
166,
168
83,
84,
88
5
2
3
3
8
6
8
2
6
9
2
3
16
11-16
19,
36,
41,
42
57
29,
39
www . x ia o y u 1 6 3 . c o m
QQ 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-17-
BLOCK DIAGRAM - 6 (AUDIO)
IC402
LPF &Buffer
NJM4580M
OP AMP
IC401
PCM1716E
Audio DAC
To
MAIN u-COM
SECTION
DAC_RST
S_DATA
S_CLK
DAC_L0
DA_LRCK
DA_BCK
DA_XCK
DA_DATA0
To
MPEG
SECTION
L
R
L
R
To
JACK
SECTION
22
2
6
18
1
7
13
26
27
28
1
3
5
2
www . x ia o y u 1 6 3 . c o m
QQ 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-18-
BLOCK DIAGRAM - 7 (MPEG) <HR>
To
DVD DSP
SECTION
To
AUDIO
SECTION
To
JACK
SECTION
To
MAIN
u-COM
SECTION
To
MAIN
u-COM
SECTION
To
DVD DSP
SECTION
IC301
ZiVA3-P
MPEG A/V
Decoder
IC303
GM72V161621ET-7
1M x 16bit
SDRAM
IC302
GM72V161621ET-7
1M x 16bit
SDRAM
IC304
PLL1700E
CLOCK
GENERATROR
IC305
SAA7128
NTSC/PAL
Encoder
IC306
BA7660FS
6dB AMP
IC307
BA7660FS
6dB AMP
X301
27MHz
X-TAL
DVD_DATA[0:7]
DAI_DATA
DA_DATA0
DA_BCK,DA_XCK,DA_LRCK
SPDIF
HSYNC,VSYNC
CVBS
Y
C
Y
Pb
Pr
CVBS
Y
C
Y
Pb
Pr
VDATA[0:7]
DA_XCK
DA_XCK
MPEG_CLK
IIC_DATA,IIC_CLK
IIC_DATA,IIC_CLK
DAC_RST
8
192,
196
191
171
161
3,166,
167
159
157,
158
169
177
200
13
7,8
2
4
7
4
2
7
30
27
24
15
3
10
15
3
10
29
23
11
36
18
14
36
18
14
90
82,84,
85,86
80
88
79
17
5
6
12
1,19,20
40
41,42
SDCLK1,ZISENB
REQZ1
2
A[00:02]
D[00:07]
MPEG_ERROR
MPEG_RST
DVD_SD_CS0
DVD_UDQM
DVD_MD[0:15]
DVD_MA[0:11]
DVD_SD_CAS
DVD_SD_RAS
DVD_SD_CLK
DVD_MWE
DVD_SD_CS1
DVD_LDQM
DVD_LDQM
S_CLK,S_DATA,DPLL_L
MCK
3
8
4
2
2
12
16
8
2
3
15-17,35
15-17,35
www . x ia o y u 1 6 3 . c o m
QQ 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-19-
BLOCK DIAGRAM - 8 (MPEG) <Except HR>
IC301
ZiVA4.1
MPEG A/V
Decoder
DVD_DATA[0:7]
DA_DATA0
DA_BCK,DA_XCK,DA_LRCK
SPDIF
8
2
SDCLK1,ZISENB
REQZ1
2
A[00:02]
D[00:07]
MPEG_ERROR
MPEG_RST
3
8
CVBS
CVBS/G/Y
Y/B/U
C/R/V
CVBS
Y
C
Y(G)
PB(B)
PR(R)
Y.SEL
IC372
LA7135A
SwitchIC
To
DVD DSP
SECTION
To
MAIN
u-COM
SECTION
171,
173
172
174
5
161
127
133
139
145
15
19
21
13
17
6
1,2
10
3
151
122,126
To
AUDIO
SECTION
To
JACK
SECTION
To
MAIN
u-COM
SECTION
To
DVD DSP
SECTION
IC303
GM72V161621ET-7
1M x 16bit
SDRAM
IC302
GM72V161621ET-7
1M x 16bit
SDRAM
IC304
PLL1700E
CLOCK
GENERATROR
X301
27MHz
X-TAL
DA_XCK
MPEG_CLK
125
159
11
18 14,36
18
14,36
95
78,90,
91,94
96
77
17
5
6
12
1,19,20
DVD_SD_CS0
DVD_MD[0:15]
DVD_MA[0:11]
DVD_SD_CAS
DVD_SD_RAS
DVD_SD_CLK
DVD_MWE
DVD_SD_CS1
DVD_LDQM
DVD_LDQM
S_CLK,S_DATA,DPLL_L
MCK
4
12
16
3
15-17,35
15-17,35
DA_XCK
www . x ia o y u 1 6 3 . c o m
QQ 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-20-
BLOCK DIAGRAM - 9 (µ-COM)
To
JACK
SECTION
To
MPEG
SECTION
To
TIMER
SECTION
To
DRIVE & RF
SECTION
To
DVD DSP
SECTION
IC506
XC9536
IC502
AT49F8192A
FLASH
ROM
IC503
V53C16256HK
DRAM
IC505
SN74AHC374P
IC501
HD6417034AFI20
IC504
EEPROM
KS24C02KS
16:9,SYSTEM_SW
LD_ON,LOAD CLOSE,MIRR,ACT_MUTE
LOAD_OPEN,SPINDLE_FG
D[00:07],A[00:02],IIC_CLK,IIC_DATA,SCLK, MPEG_RST
,MPEG_INT,V_MUTE,DAC_RST,Y_SEL
MPEG_ERROR
,DAC_L0
,RF_LAT
,/DSP_CS
,/MPEG_CS
,/PP_CS 16:9,
,Y_SEL
,,MPEG_RST
/PWR_CTL
,SENS,LIMIT_SW
,MIC_ON,CLOSE_SW
,OPEN_SW,MPEG_WAIT
,/WR,/IOCS1,
,M_RESET
M_RESET
,RXD0
,TXD0
,SCK0
,F_REQ
,MODE_SW
,M_REQ,
,ECHO
IIC_CLK
,IIC_DATA
SENS_MCOM
, MICOM_WAIT
/IOCS1,/WR
D[00:04]
A[19:21]
A[01:20]
D[00:15]
A[01:09]
D[00:15]
A[01:22]
D[00:15]
D[00:07]
DAC_RST
,E_DR
,/S_XRST
,XLAT
,ACT_MUTE
,LOAD_OPEN
,LOAD CLOSE
,/PWR_RST
EXP_W2
,/PWR_CTL
2
2
2
8
8
8
10
2
3
5
8
20
16
9
16
16
22
D[00:07],A[00:05], ,E_SIN,E_CLK
LOCK,DEFECT,FOK,DSP_SENSE,
www . x ia o y u 1 6 3 . c o m
QQ 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-21-
BLOCK DIAGRAM - 10 (KARAOKE) <HR>
MJ801
MIC1
MJ801
MIC1
Microphone
Signal
PREAMP
IC801
BA3308
AMP
IC802
KIA4558
AUDIO
ADC
IC4M1
CS5331A-KS
DVD DSP
IC201
GDC25D801C
MPEG
IC301
ZIVA3-P
AUDIO
DAC
IC401
PCM1716E
www . x ia o y u 1 6 3 . c o m
QQ 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-22-
WIRE HARNESS DIAGRAM
DOWNLOAD
JIG
DVD MECHA.
PICK UP CB
DVD MECHA.
LOADING
MOTOR C.B
DVD MECHA.
SPINDLE
MOTOR C.B
MAIN C.B
INTERFACE
C.B
KEY 1 C.B
KEY 2 C.B
P3901
P5901
ECH_VOL
MIC_ON
16:9
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QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-23-
SCHEMATIC DIAGRAM - 1 (MAIN -1/5, AUDIO SECTION)
AUDIO L SIGNAL
AUDIO R SIGNAL
PQ20WZ5U
47UF/6.3V
47UF/6.3V
47UF/6.3V
47UF/6.3V
100UF/16V
HB-1M2012-102JT
HB-1M2012-102JT
LRCIN
DIN
BCKIN
CLKO
XTI
XTO
DGND
Vdd
Vcc2R
AGND2R
EXTR
NC
VoutR
AGND1
ML/IIS
MC/DM1
MD/DM0
MUTE
MODE
CS/IWO
RST
ZERO
Vcc2L
AGND2L
EXTL
NC
VoutL
Vcc1
MAIN-1/5 (AUDIO SECTION) C.B
E1
E2
E3
E4
E5
E6
E7
E8
L2
L3
L1
R3
R8
D19
D18
D17
D1
D2
D5
D6
D7
D8
D4
D3
D9
D10
D11
D12
D13
D14
D15
D16
To
MAIN-5/5
(MAIN u-COM)
E1-E8
To
MAIN-5/5
(MAIN u-COM)
R3,R8
To
MAIN-4/5
(MPEG)
D1-D19
To
MPEG
SECTION
L1-L3
(3/3)
(3/3)
(3/3)
HB-1M2012-102JT
<HRJNK>
CS5331A-KS
(2/3)
(1/3)
(1/3)
(1/3)
(2/3)
(2/3)
AUDIO DAC
OPAMP
<HRJNK>
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-24-
SCHEMATIC DIAGRAM - 2 (MAIN -2/5, DRIVE & RF SECTION)
4
1
1
6
2
3
WAVEFORM
10U/6.3V
HB-1M2012-102JT
7.5K
5.6K
DTC124EK
DTC124EK
DTC124EK
H1
H2
H3
R5
R3
R8
R1
R2
H4
H5
H6
G7
G1
G2
G3
G4
G5
G6
H7
To
MAIN-5/5
(MAIN u-COM)
H1-H7
To
MAIN-5/5
(MAIN u-COM)
R1-R3,R5,R8
To
DVD MECHA.
LOADING
MOTOR C.B
To
DVD MECHA.
SPINDLE
MOTOR C.B
To
MAIN-3/5
(DVD DSP)
G1-G7
To
MAIN-3/5
(DVD DSP)
G19
To
MAIN-3/5
(DVD DSP)
G8-G13
To
MAIN-3/5
(DVD DSP)
G14-G18
-TE1
SSI33P3721
RF SIGNAL
PROCESSOR
MAIN-2/5 (DRIVE & RF SECTION) C.B
TRACKING LOOP
FOCUS LOOP
SLED LOOP
SPINDLE LOOP
G19
H11
H12
H13
G8
G9
G10
G11
G12
G13
H8
H9
G14
G15
G16
G17
H10
G18
To
MAIN-5/5
(MAIN u-COM)
H11-H13
To
MAIN-5/5
(MAIN u-COM)
H8,H9
To
MAIN-5/5
(MAIN u-COM)
H10
HB-1M2012-102JT
To
DVD MECHA.
PICK UP CB
(2/3)
(3/3)
(1/3)
MOTOR DRIVE
REF
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-25-
SCHEMATIC DIAGRAM - 3 (MAIN -3/5, DVD DSP SECTION)
5
5
6
TRACKING LOOP
FOCUS LOOP
SLED LOOP
SPINDLE LOOP
WAVEFORM
MAIN-3/5 (DVD DSP SECTION) C.B
IC205
GLT441L16
DRAM
10UF/6.3V
IC201
GDC25D801C
CD/DVD DSP
DVD SERVO
L201-L204,L207,L208,L211
HB-1M2012-102JT
*
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
F23
F24
F25
F26
F27
F28
F29
F30
F31
F32
F33
F34
F35
G3
G18
G1
G2
G4
G13
G10
G16
G9
G17
G11
G15
G12
G19
G6
G7
G5
G8
G14
K2
K1
K4
K5
K6
K7
K8
K9
K10
K11
K3
K12
F36
To
MAIN-5/5
(MAIN u-COM)
F1-F37
To
MAIN-2/5
(DRIVE & RF)
G1-G19
To
MAIN-4/5
(MPEG)
K1-K12
R5
R8
R7
To
MAIN-5/5
(MAIN u-COM)
R5,R7,R8
(3/3)
(4/4)
(2/3)
(3/3)
(3/4)
(1/3)
(1/3)
(2/3)
(2/4)
(1/4)
(1/3)
F37
(2/3)
(3/3)
VCC
VCC
VCC
NC
NC
NC
NC
GND
GND
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-26-
SCHEMATIC DIAGRAM - 4 (MAIN -4/5, MPEG SECTION) <HR>
5
6
7
8
1
1
2
4
3
9
11
10
WAVEFORM
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
K12
To
MAIN-3/5
(DVD DSP)
K1-K12
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D18
D19
D17
To
MAIN-1/5
(AUDIO)
D1-D19
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C25
C20
C21
C22
C19
C23
C24
C26
C27
To
MAIN-5/5
(MAIN u-COM)
C1-C27
L1
L2
L3
R4
R6
R8
R7
To
MAIN-1/5
(AUDIO)
L1-L3
To
MAIN-5/5
(MAIN u-COM)
R4,R6-R8
(3/3)
(3/3)
To
INTERFACE-1/3 C.B
(JACK)
P6401
MAIN-4/5 (MPEG SECTION) C.B <HR>
VIDEO
ENCODER
(2/3)
(2/3)
(3/3)
(1/3)
(3/3)
2SC2412
2SC2412
2SC2412
2SC2412
6.3V
(1/3)
(3/3)
27MHz
L301-L309
HB-1M2012-102JT
*
ET-7
ET-7
(1/3)
(2/3)
ZIVA3-P
MPEG A/V
DECODER
SDRAM
SDRAM
CLOCK
GEN.
6dB AMP
6dB AMP
VCC
VCC
CKE
GND
GND
VSSQ
VSSQ
VSSQ
VCCQ
VCCQ
VCCQ
VCCQ
DPLL_L
MODE
VDD
GND
XT2
XT1
GND
VDDP
RSV
MCKO
S_CLK
S_DATA
MICOM_RESET
DA_XCK
VDDB
GNDB
SCK02
SCK04
MCK
MPEG_CLK
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
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-27-
SCHEMATIC DIAGRAM - 5 (MAIN -4/5, MPEG SECTION) <Except HR>
/MADDR11
1%
ET-7
ET-7
27MHz
6.3V
2SC2412KR
(BR)
2SC2412KR
(BR)
2SC2412KR
(BR)
2SC2412KR
(BR)
2SC2412KR
(BR)
2SC2412KR
(BR)
2SC2412KR
(BR)
L301-L308,L371
HB-1M2012-102JT
*
S
6.3V
6.3V
6.3V
To
INTERFACE-1/3 C.B
(JACK)
P6401
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
K12
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
L1
L2
L3
R4
R6
R8
R7
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
To
MAIN-5/5
(MAIN u-COM)
C1-C24
To
MAIN-1/5
(AUDIO)
L1-L3
To
MAIN-5/5
(MAIN u-COM)
R4,R6-R8
To
MAIN-1/5
(AUDIO)
D1-D17
To
MAIN-3/5
(DVD DSP)
K1-K12
MAIN-4/5 (MPEG SECTION) C.B <U, K, EZ>
(2/3)
(2/3)
(3/3)
(1/3)
(1/3)
(2/3)
(2/3)
(2/3)
(1/3)
(3/3)
(1/3)
(3/3)
(3/3)
(3/3)
MPEG_CLK
(1/3)
MPEG A/V
DECODER
A
SWITCH
CLOCK
GEN.
SDRAM
SDRAM
DPLL_L
MODE
VDD
GND
XT2
XT1
GND
VDDP
RSV
MCKO
S_CLK
S_DATA
MICOM_RESET
DA_XCK
VDDB
GNDB
SCK02
SCK04
MCK
MPEG_CLK
VCC
VCC
CKE
GND
GND
VSSQ
VSSQ
VSSQ
VCCQ
VCCQ
VCCQ
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-28-
SCHEMATIC DIAGRAM - 6 (MAIN -5/5, MAIN µ-COM SECTION)
FLASH ROM
DRAM
50
MAIN u-COM
CPLD
C536
10µ/16V
MAIN-5/5 (MAIN u-COM SECTION) C.B
E1
E6
C27
C26
C25
IIC_DATA
IIC_CLK
DAC_RST
IIC_DATA
IIC_CLK
DAC_RST
E4
E5
E3
E2
E7
E8
H6
H3
H2
H4
H5
H1
H10
H7
H8
H9
H11
H12
H13
F1
F16
F17
F5
F6
F7
F18
F27
F30
F22
F19
F21
F20
F28
F26
F32
F33
F34
F31
F29
F25
F36
F35
F2
F3
F4
F8
F9
F10
F11
F12
F13
F14
F15
F23
F24
F37
C3
C4
C5
C8
C9
C10
C11
C12
C13
C14
C15
C23
C2
C17
C18
C16
C6
C19
C22
C7
C24
C1
C20
C21
To
MAIN-1/5
(AUDIO)
E1-E8
To
INTERFACE-1/3 C.B
(TIMER)
P9501
To
MAIN-4/5
(MPEG)
C1-C27
To
MAIN-3/5
(DVD DSP)
F1-F37
To
MAIN-2/5
(DRIVE & RF)
H1-H13
(1/4)
(1/5)
(1/5)
(1/6)
(2/5)
(2/5)
(2/6)
(4/4)
(3/5)
(3/5)
(1/3)
(1/3)
(3/3)
(2/3)
(4/5)
(4/5)
(3/6)
(2/4)
(3/4)
KS24C021CS
EEPROM
(5/5)
(5/5)
(4/6)
(3/4)
AT49F8192A
EXPANDER
(4/4)
(6/6)
(2/4)
(1/4)
(5/6)
DOWNLOAD
JIG
L501-L503,L505-L507
HB-1M2012-102JT
*
<UBK,KNK,EZBK/EZNK>
<UBK,KNK,EZBK/EZNK>
R507 0
R508 0
R592 0
R596 0
(2/3)
(2/3)
(3/3)
(3/3)
(1/3)
R1
R2
R3
R4
R5
R6
R7
R8
To
MAIN-1/5~4/5
(AUDIO,
DRIVE & RF,
DVD DSP,
MPEG)
R1-R8
<HRJNK>
HD6417034AFI20
VCC
VCC
OE
VSS
VSS
BYTE
GND
GND
VCC
RESET
OE
WE
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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WIRING - 1 (MAIN C.B) <HR>
-29-
MAIN C.B <HR>
1
4
8
5
B
E
C
B
E
C
B
E
C
B
E
C
1
4
8
5
1
4
8
5
14
10
6
2
1
1
4
8
5
5
9
15
B
E
C
B
E
C
E
B
C
1
5
10
8
1
4
8
5
6 4
1 3
2
6
10
14
18
22
1
5
9
13
17
21
23
1
7
2
8
E
B
C
E
B
C
1
4
8
5
1
5
1
4
8
5
E
B
C
P3901
To
INTERFACE C.B
P6401
P5502
DOWN LOAD
JIG
PMD04
To
DVD MECHA.
LOADING
MOTOR C.B
P5901
To
INTERFACE C.B
P9501
PMD02
To
DVD MECHA.
PICK UP C.B
PMD03
To
DVD MECHA.
SPINDLE
MOTOR C.B
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
1
2
3
4
5
6
7
8
9
25
26
27
28
29
30
31
32
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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WIRING - 2 (MAIN C.B) <Except HR>
-30-
MAIN C.B <U, K, EZ>
1
4
1
4
8
5
8
5
1
1
2
6
10
14
18
22
1
5
1
4
8
5
6 4
1 3
9
13
17
21
23
1
4
8
5
7
2
8
5
1
4
8
5
5
15
25
35
45
50
26
1
10 14
15
20
28
1
5
10
15
20
40
35
30
25
21
1
10
20
24
25
35
4548
1
4
8
5
1
11
12
22
23
33
34
44
28
57
84
29
56
85
112
21
52
105
156
53
208
104
157
1
52
105
156
53
104
157
208
1
10
20
25
26
30
40
50
1
5
1
5
1
10
16
17
32
33
40
48
49
55
64
B
E
C
B
E
C
E
B
C
B
E
C
B
E
C
B
E
C
B
E
C
B
E
C
B
E
C
B
E
C
B
E
C
E
B
C
E
B
C
E
B
C
1
12
13
24
14
10
6
2
1
1
12
13
2425
36
37
48
5
9
15
P3901
To
INTERFACE C.B
P6401
P5502
DOWN LOAD
JIG
PMD04
To
DVD MECHA.
LOADING
MOTOR C.B
P5901
To
INTERFACE C.B
P9501
PMD02
To
DVD MECHA.
PICK UP C.B
PMD03
To
DVD MECHA.
SPINDLE
MOTOR C.B
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
1
2
3
4
5
6
7
8
9
25
26
27
28
29
30
31
32
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-31-
SCHEMATIC DIAGRAM - 7 (INTERFACE - 1/3, TIMER SECTION) (KEY1, KEY2 SECTION) <HR>
RESET
REMOCON
RECEIVER
FRONT CONTROL
KEY2 C.B
KEY1 C.B
INTERFACE-2/3 (TIMER SECTION) C.B <HR>
SW912
SW906
SW907
SW908
SW905
SW904
STOP
SW903
PLAY
OPEN/CLOSE
SW902
SW913
SW911
SW910
ENTER
SW914
MENU
/
/
STANDBY/ON
TSOP2838WE1
(2/4)
(1/4)
LC866112B-5N21
7-BT-273GN
To
INTERFACE-2/3
(JACK)
B1-B10
B6
B7
B10
B3
B1
B2
B9
B8
B4
B5
To
MAIN-5/5 C.B
(MAIN u-COM)
P5901
To
INTERFACE-3/3
(POWER)
A1-A17
A1
A2
A4
A3
A11
A16
A14
A13
A15
A8
A9
A7
A12
A5
A10
A6
A17
(3/4)
(1/3)
DIGITAL
ECHO
MIC 1
VOL
MIC 2
VOL
MIC 1
MIC 2
MF
MF
MF
P
1.8K
22K
(2/3)
(3/3)
(4/4)
T/W:JUMPER WIRE
*
PREAMP
AMP
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-32-
SCHEMATIC DIAGRAM - 8 (INTERFACE - 1/3, TIMER SECTION) (KEY1, KEY2 SECTION) <Except HR>
RESET
REMOCON
RECEIVER
FRONT CONTROL
KEY2 C.B
KEY1 C.B
INTERFACE-1/3 (TIMER SECTION) C.B <U, K, EZ>
SW912
SW906
SW907
SW908
SW905
SW904
STOP
SW903
PLAY
OPEN/CLOSE
SW902
SW913
SW911
SW910
ENTER
SW914
MENU
/
/
STANDBY/ON
TSOP2838WE1
(2/4)
(1/4)
LC866112B-5N21
7-BT-273GN
To
INTERFACE-2/3
(JACK)
B1-B10
B6
B7
B10
B3
B1
B2
B9
B8
B4
B5
To
MAIN-5/5 C.B
(MAIN u-COM)
P5901
To
INTERFACE-3/3
(POWER)
A1-A17
A1
A2
A4
A3
A11
A16
A14
A13
A15
A8
A9
A7
A12
A5
A10
A6
A17
(3/4)
(1/3)
(2/3)
(4/4)
(3/3)
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-33-
SCHEMATIC DIAGRAM - 9 (INTERFACE -2/3, JACK SECTION) <HR>
S VIDEO (C)
AUDIO (L)
AUDIO (R)
OPTICAL
COMP.VIDEO
S VIDEO (Y)
MF
GDZJ5.6B
GDZJ5.6B
GDZJ5.6B
GDZJ5.6B
ZD635
ZD636
ZD638
ZD637
GDZJ5.6B
GDZJ5.6B
MF
KTC3198
KTC3198
KTA1266-GR
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
To
INTERFACE-1/3
(TIMER)
B1-B10
To
MAIN-4/5 C.B
(MPEG)
P3901
INTERFACE-2/3 (JACK SECTION) C.B <HR>
R622
22
DIGITAL
OUT
DIGITAL
OUT
S-VIDEO
OUT
VIDEO
OUT
AUDIO
OUT
COMPONENT
VIDEO OUT
(
)
)
(
R
Y
Pr
Pb
L
AUDIO
OUT2
R
L
C608
0.047UF
D603
D604
R6M2
R6M1
R6M4
R6M3
J602
J605
J606
J607
J612
J613
J608
J609
J610
C6Z1
C6Z2
C6Z3
Y(G)
Pr(R)
Pb(B)
1
2
3
4
(2/3)
(2/3)
(3/3)
(3/3)
(1/3)
(1/3)
T/W:JUMPER WIRE
*
T/W
T/W
JK602
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-34-
SCHEMATIC DIAGRAM - 10 (INTERFACE -2/3, JACK SECTION) <U>
S VIDEO (C)
AUDIO (L)
AUDIO (R)
OPTICAL
COMP.VIDEO
S VIDEO (Y)
MF
MF
GDZJ5.6B
GDZJ5.6B
GDZJ5.6B
GDZJ5.6B
ZD635
ZD636
ZD638
ZD637
GDZJ5.6B
GDZJ5.6B
MF
MF
MF
MF
MF
MF
MF
MF
MF
470U/10V
KTC3198
KTC3198
KTA1266-GR
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
To
INTERFACE-1/3
(TIMER)
B1-B10
To
MAIN-4/5 C.B
(MPEG)
P3901
470U/10V
INTERFACE-2/3 (JACK SECTION) C.B <U>
R622
22
DIGITAL
OUT
DIGITAL
OUT
S-VIDEO
OUT
VIDEO
OUT
AUDIO
OUT
(
)
)
(
R
L
AUDIO
OUT2
R
L
C608
0.047UF
D603
D604
R6M2
R6M1
R6M4
R6M3
COMPONENT
VIDEO OUT
Y
Pr
Pb
C6Z1
470U/10V
C6Z2
470U/10V
C6Z3
470U/10V
Y(G)
Pr(R)
Pb(B)
F607
F608
F609
F611
1
2
3
4
(2/3)
(2/3)
(3/3)
(3/3)
T/W
T/W
T/W
(1/3)
(1/3)
T/W:JUMPER WIRE
*
JK602
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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-35-
SCHEMATIC DIAGRAM - 11 (INTERFACE -2/3, JACK SECTION) <K, EZ>
(2/3)
S VIDEO (C)
AUDIO (L)
AUDIO (R)
OPTICAL
COMP.VIDEO
S VIDEO (Y)
MF
MF
GDZJ5.6B
GDZJ5.6B
GDZJ5.6B
GDZJ5.6B
ZD635
ZD636
ZD638
ZD637
GDZJ5.6B
GDZJ5.6B
MF
MF
MF
MF
MF
MF
MF
MF
MF
470U/10V
KTC3198
KTC3198
KTA1266-GR
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
To
INTERFACE-1/3
(TIMER)
B1-B10
To
MAIN-4/5 C.B
(MPEG)
P3901
100
100
KTA1266-GR
KTA1266-GR
KTA1266-GR
47U/16V
0.01UF
680
680
100U
470U/10V
MF
MF
MF
MF
MF
MF
470U/10V
INTERFACE-2/3 (JACK SECTION) C.B <K, EZ>
R622
22
DIGITAL
OUT
DIGITAL
OUT
S-VIDEO
OUT
VIDEO
OUT
AUDIO
OUT
(
)
)
(
R
L
F614
CENTER
MF
F611
WOOFER
FR
FL
F615
F616
To
21PIN SCART
CONNECTOR
C6Z6
470U/10V
C6Z5
470U/10V
C6Z4
470U/10V
JK603
ZD640
ZD639
GDZJ5.6B
GDZJ5.6B
C608
0.047UF
D603
D604
1
2
3
4
(1/3)
T/W
T/W
(3/3)
T/W:JUMPER WIRE
*
JK602
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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-36-
SCHEMATIC DIAGRAM - 12 (INTERFACE -3/3, POWER SECTION) <U>
NOTES) Warning
NOTES) Parts that are shaded are critical
NOTES) With respect to risk of fire or
NOTES) electricial shock.
(T/W)
470 /10V
AC INPUT
-10A
275V
1W
350V
LTV-817B
-02
-02
-01
TRANS
GDZJ5.6B
GDZJ6.2B
PQ3RD13
3.3V REG
PQ3RD13
3.3V REG
8V REG
-Y
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
To
NTERFACE-1/3
(TIMER)
A1-A17
INTERFACE-3/3 (POWER SECTION) C.B <U>
T/W:JUMPER WIRE
*
3
2
1
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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-37-
SCHEMATIC DIAGRAM - 13 (INTERFACE -3/3, POWER SECTION) <Except U>
NOTES) Warning
NOTES) Parts that are shaded are critical
NOTES) With respect to risk of fire or
NOTES) electricial shock.
LTV-817B
TRANS
DRIVE &
OVER CURRENT LIMIT
400V
275V
275V
-10A
(1/2W)
AC INPUT
INTERFACE-3/3 (POWER SECTION) C.B <HR, K, EZ>
-02
-C1
8V REG
-Y
PQ3RD13
3.3V REG
PQ3RD13
3.3V REG
GDZJ5.6B
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
To
NTERFACE-1/3
(TIMER)
A1-A17
3
2
1
T/W:JUMPER WIRE
*
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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WIRING - 3 (INTERFACE C.B) <HR>
-38-
INTERFACE C.B
<HR>
JK601
DIGITAL
OUT
3
1
2
3
1
2
VR803
DIGITAL
ECHO
VR802
MIC 2
VOL
VR801
MIC 1
VOL
MJ802
MIC 2
MJ801
MIC 1
1
2
3
4
5
7
9
11
13
1
2
4
3
AC INPUT
P9902
To
KEY1 C.B
P9901
DIG901
(DIGTRON)
RC901
(REMOCON RECEIVE)
P9904
To
KEY2 C.B
P9903
P9501
To
MAIN C.B
P5901
P6401
To
MAIN C.B
P3901
T/W
T/W
T/W
T/W
T/W
1
2
5
6
9
10
13
14
17
18
21
22
25
26
29
30
1
2
5
6
9
10
13
14
17
18
21
22
25
26
29
30
1
3
3
1
E
C
B
E
C
B
E
C
B
B
C
E
3
1
1
3
1
3
1
3
B
C
E
B
C
E
B
C
E
3
1
3
1
1
3
SW601
PAL
NTSC
AUTO
S-VIDEO
OUT
DIGITAL
OUT
L
R
AUDIO
OUT2
AUDIO
OUT
L
R
VIDEO
OUT
Pb
Pr
Y
COMPONENT
VIDEO OUT
4
1
4
1
4
1
4
1
J613
J602
J612
J610
J609
J608
J605
J607
J606
1
3
5
4
2
1
2
3
4
T/W
T/W
T/W
T/W
T/W
T/W
T/W:JUMPER WIRE
*
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
1
2
3
4
5
6
7
8
9
25
26
27
28
29
30
31
32
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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WIRING - 4 (INTERFACE C.B) <U>
-39-
INTERFACE C.B <U>
JK601
DIGITAL
OUT
AC INPUT
DIG901
(DIGTRON)
RC901
(REMOCON RECEIVE)
P9904
To
KEY2 C.B
P9903
P9501
To
MAIN C.B
P5901
P6401
To
MAIN C.B
P3901
E
C
B
T/W
T/W
T/W
T/W
T/W
T/W
T/W
T/W
1
2
5
6
9
10
13
14
17
18
21
22
25
26
29
30
1
2
5
6
9
10
13
14
17
18
21
22
25
26
29
30
1
2
4
3
1
2
3
4
5
7
9
11
13
4
1
1
3
3
1
E
C
B
E
C
B
E
C
B
B
C
E
3
1
B
C
E
B
C
E
B
C
E
3
1
3
1
1
3
S-VIDEO
OUT
DIGITAL
OUT
L
R
AUDIO
OUT2
AUDIO
OUT
L
R
VIDEO
OUT
Pb
Pr
Y
COMPONENT
VIDEO OUT
4
1
4
1
4
1
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
E
C
B
T/W:JUMPER WIRE
*
T/W
1
2
3
4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
1
2
3
4
5
6
7
8
9
25
26
27
28
29
30
31
32
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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WIRING - 5 (INTERFACE C.B) <K, EZ>
-40-
INTERFACE C.B
<K, EZ>
JK601
DIGITAL
OUT
AC INPUT
P9902
To
KEY1 C.B
P9901
DIG901
(DIGTRON)
RC901
(REMOCON RECEIVE)
P9904
To
KEY2 C.B
P9903
P9501
To
MAIN C.B
P5901
P6401
To
MAIN C.B
P3901
1
2
3
4
T/W
T/W
T/W:JUMPER WIRE
*
1
2
5
6
9
10
13
14
17
18
21
22
25
26
29
30
1
2
5
6
9
10
13
14
17
18
21
22
25
26
29
30
4
1
1
2
4
3
1
2
3
4
5
7
9
11
13
1
3
5
4
2
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
3
1
B
C
E
E
C
B
E
C
B
E
C
B
E
C
B
E
C
B
B
C
E
3
1
B
C
E
B
C
E
B
C
E
E
C
B
E
C
B
3
1
3
1
1
3
SW601
PAL
NTSC
AUTO
S-VIDEO
OUT
DIGITAL
OUT
AUDIO
OUT
L
R
VIDEO
OUT
4
1
4
1
4
1
JK603
To
21PIN SCART
CONNECTOR
T/W
T/W
T/W
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
1
2
3
4
5
6
7
8
9
25
26
27
28
29
30
31
32
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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KEY2 C.B
12
4
1
SW901
LED901
STANDBY/ON
POWER
To
INTERFACE C.B
P9902
KEY1 C.B
SW912
SW912
SW913
SW904
SW906
SW907
SW906
SW907
SW908
SW905
SW908
SW905
SW903
SW904
STOP
PLAY
SW903
OPEN/CLOSE
SW902
SW902
SW911
SW913
SW911
SW910
SW910
ENTER
SW914
SW914
MENU
/
/
To
INTERFACE C.B
P9904
WIRING - 6 (KEY1, KEY2 C.B)
-41-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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-42-
WAVEFORMS - 1/2
IC305 (VIDEO ENCODER)
IC305 Pins 9 ~ 16 MPEG Data
1.0V/500µs
1
IC305 Pin30 Composite
500mV/20µs
2
IC305 Pin24 Chrominance
500mV/20µs
3
IC305 Pin27 Luminance
500mV/20µs
4
IC305 Pins 40,41 SDA/SCL
1.0V/25ms
5
IC305 Pin4 MPEG Clock (27MHz)
1.0V/500µs
6
IC305 Pin7 Vertical SYNC
1.0V/5ms
7
IC305 Pin8 Horizontal SYNC
1.0V/20µs
8
IC305 Pin29 Component Pb
500mV/20µs
9
IC305 Pin23 Component Pr
500mV/20µs
10
IC305 Pin27 Component Y
500mV/20µs
11
M 20.0 s
CH1
280/mV
Ch3
1.00V
T
M 5 .00ms CH1
280/mV
Ch3
1.00V
T
T
M 500 s
CH1
280/mV
Ch3
1.00V
T
M 500 s
CH1
280/mV
Ch3
1.00V
T
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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-43-
WAVEFORMS - 2/2
IC2A1, IC201 (RF/SERVO)
IC2A1 Pin24 Focus Error
IC2A1 Pin36 Pi
500mV/5ms
1
IC2A1 Pin41 Tracing Error
500mV/2ms
2
IC2A1 Pin41 VBR Tracking Error
500mV/300µs
3
IC2A1 Pin57 RF
0.5V/0.1µs
4
IC201 Pin88 SLED Driver (FMO)
IC201 Pin18 SLED FG
A: 2.0V/500ms, B: 500mV/500ms
5
IC2A1 Pin42 Focus Error(in Focus Search)
IC201 Pin83 Focus Drive (FDO)
A: 200mV/100ms, B: 500mV/100ms
6
A
A
B
B
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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-44-
IC BLOCK DIAGRAM - 1/2
Serial
Input
I/F
Mode
Control
I/F
8X Oversampling
Digital Filter with
Function
Controller
Crystal/OSC
XTI
SCK
XTO
CLKO
VCC1 AGND1
VDD
DGND
Enhanced
Multi-level
Delta-Sigma
Modulator
VOUTL
VCC2L
VCC2R
AGND2R
AGND2L
EXTL
Open Drain
DAC
Low-pass
Filter
Low-pass
Filter
BPZ-Cont.
VOUTR
EXTR
ZERO
DAC
MC/DM1
ML/IIS
LRCIN
DIN
BCKIN
CS/IWO
MD/DM0
MODE
MUTE
RST
Power Supply
3
1
2
28
27
26
23
24
25
22
5
6
4
15
14
8
7
21
11
13
18
16
10
9
19
20
Specilic IC
1
2
IN
Vc
5
GND
4
3
VADJ
OUT
VDD
VSS
VEE
LOGIC LEVEL
CONVERTER
OUT IN
C
OUT IN
C
8
5
2
A
INH
4
3
6
7
1
CH1
CH0
COMMON
RAS
Timing
Generator
LCAS
Column
Address
Buffers
Internal
Address
Counter
Row
Address
Buffers
Refresh
Control
Clock
Column Decoders
Sense Amps
Memory Cells
Word Drivers
Row Decoders
I/O Selector
Output
Buffer
Input
Buffer
VSS
VCC
Output
Buffer
Input
Buffer
UCAS
I/O Controller
I/O Controller
WE
OE 27
13
28
29
14
16
~
19
22
~
26
21
VSS 35
VSS 40
20
VCC
6
VCC
1
.
ICADDR0~
ICADDR8
2
~
5
7
~
10
.
31
~
34
36
~
39
.
ICDATAO0~
ICDATAO7
ICDATAO8~
ICDATAO15
IC, GLT441L16-40
IC, PQ20WZ5U
IC, TC4W53FU
IC, PCM1716E
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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-45-
IC, PLL1700E
IC BLOCK DIAGRAM - 2/2
IC, XC9536_15VQ44C-PROG
OSC
PLL2
PLL1
Counter Q
Counter P
SCKO2
SCKO3
SCKO4
MCKO
MCKO
XT1
XT2
Reset
Mode
Control
I/F
Power Supply
RST
MODE
ML
MC
MD
VDDP
VDDB
VDD
GNDP
GNDB
GND
SCKO1
18
5
6
12
11
17
9
10
13
3
19
20
1
14
2
8
7
16
15
In-System Programming Controller
JTAG
Controller
I/O
Blocks
Function
Block 1
Macrocells
1 to 18
Macrocells
1 to 18
Macrocells
1 to 18
Macrocells
1 to 18
JTAG Port
3
54
I/O/GTS
I/O/GSR
I/O/GCK
I/O
I/O
I/O
I/O
2
1
I/O
I/O
I/O
I/O
3
1
Function
Block 2
54
Function
Block 3
54
Function
Block 4
54
18
18
18
18
FastCONNECT II Switch Matrix
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8
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9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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Pin No.
Pin Name
I/O
Description
-46-
IC DESCRIPTION - 1/11 (SSI33P3721)-1/2
RF SIGNAL INPUTS: Differential RF signal attenuator input pins.
CD PHOTO DETECTOR INTERFACE INPUTS: Inputs from the CD photo detector outputs.
PHOTO DETECTOR NTERFACE INPUTS: AC coupled inputs for the DPD from the main
beam Photo detector matrix outputs.
DIFFERENTIAL PHASE TRACKING LPF PIN: The external capacitance is connected between
CN.
DIFFERENTIAL PHASE TRACKING LPF PIN: The external capacitance is connected between
CP.
PHOTO DETECTOR INTERFACE INPUTS: Inputs from the main beam Photo detector matrix
outputs.
CD TRACKING ERROR INPUTS: Inverted(F) and non-inverted(E) inputs of the OP-Amp for
the CD tracking error.
CD TRACKING: E-F Opamp output for feed back.
CD CENTER ERROR INPUT: Inverted input of the OP-Amp for the CD center error.
CENTER ERROR OPAMP OUTPUT: CEIN Opamp output for feedback.
Ground pin for the servo block.
APC INPUT: DVD APC input pin from the monitor photo diode.
APC OUTPUT: DVD APC output pin to control the laser power.
APC INPUT: CD APC input pin from the monitor photo diode.
APC OUTPUT: CD APC output pin to control the laser power.
APC OUTPUT ON/OFF: APC output control pin. A low level activates LD output.(open high)
REFERENCE VOLTAGE OUTPUT: This pin provides the internal DC bias reference voltage
(+2.5 V fix). Output impedance is less than 50 ohm.
REFERENCE VOLTAGE INPUT : DC bias voltage input for servo output reference.
Power supply pin for the servo block
MIRROR DETECT OUTPUT: Mirror detect comparator output. Pseudo CMOS output.
MIRR SIGNAL PEAK HOLD PIN: The external capacitance is connected to VPB.
MIRR SIGNAL BOTTOM HOLD PIN: The external capacitance is connected to VPB.
LOW IMPEDANCE ENABLE: TTL compatible input pin that activates the FDCHG switches.
A low level activates the switches and the falling edge of the internal FDCHG triggers the fast
decay for the MIRR bottom hold circuit.(open high)
MIRR SIGNAL LPF PIN: The external capacitance is connected to VPB.
MIRR SIGNAL LPF PIN: The external capacitance is connected to VPB.
RF SIGNAL INPUT FOR MIRROR: AC coupled inputs for the mirror dection circuit from pull-
in signal output (PI).
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
DVDRFP
DVDRFN
PD1
PD2
A2
B2
C2
D2
CP
CN
D
C
B
A
F
E
CDTE
CEIN
CE1
VNB
DVDRD
DVDLD
CDPD
CDLD
___________
LDON
VC
VCI
VPB
MIRR
MP
MB
______________
FDCHG
MLPF2
MLPF1
MIN
I
I
I
I
I
I
I
I
–
–
I
I
I
I
I
I
–
I
I
–
I
O
I
O
I
–
–
–
O
–
–
I
–
–
I
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9
2
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8
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9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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Pin No.
Pin Name
I/O
Description
-47-
O
O
–
O
I
O
O
O
–
I
I
I/O
I
I
–
O
O
I
I
–
–
O
–
I
I
O
O
I
O
PULL-IN SIGNAL OUTPUT: The summing signal output of A,B,C,D inputs for mirror
detection. Reference to VCI.
DEFECT OUTPUT: Pseudo CMOS output. When defect is detected, the DFT output goes high.
Also the servo AGC output can be monitored at this DFT pin, when CAR bit7-4 is ‘0011’.
PI TOP HOLD PIN: An external capacitance is connected to VPB.
TRACKING ZERO CROSSING SIGNAL OUTPUT: Tracking zero crossing output. Pseudo
CMOS output.
TRACKING ERROR AC COUPLED INPUT: AC couple input for the tracking zero crossing
signal output.
TRACKING ERROR SIGNAL OUTPUT: Tracking error output reference to VCI.
FOCUSING ERROR SIGNAL OUTPUT: Focus error output reference to VCI.
CENTER ERROR SIGNAL OUTPUT: Center error output reference to VCI.
The Servo AGC integration capacitor CBYP2, is connected between BYP2 and VNB.
HOLD CONTROL: TTL compatible control pin which, when pulled high,disables the Servo
AGC charge pump and holds the Servo AGC amplifier gain as its present value. (open high)
SERIAL CLOCK: Serial clock CMOS input. The clock applied to this pin is synchronized with
the data applied to SDATA. (not to be left open)
SERIAL DATA: Serial data bidirectional CMOS pin. NRZ programming data for the internal
registers is applied to this input. (not to be left open)
SERIAL DATA ENABLE: Serial enable CMOS input. A high level input enables the serial port.
(not to be left open)
HOLD CONTROL: TTL compatible control pin which, when pulled high, disables the RF AGC
charge pump and holds the RF AGC amplifier gain as its present value. (open high)
Ground pin for the RF block and serial port.
DIFFERENTIAL NORMAL OUTPUTS: Filter normal outputs.
ANALOG INPUTS FOR RF SINGLE BUFFER: Differential analog inputs to the RF single-end
output buffer and full wave rectifier.
REFERENCE RESISTOR INPUT: An external 12.1 or 8.2 k ohm, 1% resistor is connected from
this pin to ground to establish a precise PTAT (proportional to absolute temperature) reference
current for the filter.
The RF AGC integration capacitor CBYP, is connected between BYP and VPA.
SINGLE-ENDED NORMAL OUTPUT: Single-ended RF output.
Power supply pin for the RF block and serial port.
AGC AMPLIFIER INPUTS: Differential AGC amplifier input pins.
DIFFERENTIAL ATTENUATOR OUTPUTS: Attenuator outputs.
RF SIGNAL INPUT : Single-ended RF signal attenuator input pin.
CD RF SIGNAL OUTPUT: Single-ended CD RF summing output.
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PI
DFT
TPH
TZC
TEI
TE
FE
CE
BYP2
HOLD2
SCLK
SDATA
SDEN
HOLD1
VNA
FNN
FNP
DIP
DIN
RX
BYP
SIGO
VPA
AIP
AIN
ATON
ATOP
CDRF
CDRFDC
IC DESCRIPTION - 1/11 (SSI33P3721)-2/2
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9
2
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9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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Pin No.
Pin Name
I/O
Description
-48-
O
I
I
O
I
–
I
O
I
I
O
I
I
I
–
O
–
I
I
I
I
I
–
O
O
–
O
–
O
O
–
O
O
–
I
–
I
I
I
CH 1 op-amp output
CH 1 op-amp input (+)
CH 2 op-amp input (-)
CH 2 op-amp output
CH 3 op-amp input (+)
Ground
CH 3 op-amp input (-)
CH 3 op-amp output
CH 4 op-amp input (+)
CH 4 op-amp input (-)
CH 4 op-amp output
CH 5 motor speed control
CH 5 forward input
CH 5 reverse input
Signal ground
Opamp output
Ground
Opamp input (+)
Opamp inpt (-)
CH 4 mute
CH 3 mute
CH 1, CH 2 mute
Power supply voltage (For CH 5)
CH 5 drive output
CH 4 drive output
Ground
CH 3 drive output
Power ground
CH 2 drive output
CH 1 drive output
Power supply voltage (For CH 1, CH 2, CH 3, CH 4)
Regulator output
Regulator 5V output
Ground
Regulator reset
Signal supply voltage
Bias voltage input
CH 1 opamp input (+)
CH 1 opamp input (-)
1
2
3
4
5
6, 7
8
9
10
11
12
13
14
15
16
17
18, 19
20
21
22
23
24
25
26, 27
28, 29
30, 31
32, 33
34
35, 36
37, 38
39
40
41
42, 43
44
45
46
47
48
OUT1
IN2.1
IN2.2
OUT2
IN3.1
GND
IN3.2
OUT3
IN4.1
IN4.2
OUT4
CTL
FWD
REV
SGND
OPOUT
GND
OPIN (+)
OPIN (-)
MUTE4
MUTE3
MUTE1, 2
PVCC1
DO5.2, DO5.1
DO4.2, DO4.1
GND
DO3.2, DO3.1
PGND
DO2.2, DO2.1
DO1.2, DO1.1
PVCC2
REG50
REG050
GND
RES50
SVCC
REF
IN1.1
IN1.2
IC DESCRIPTION - 2/11 (KA3032)-1/1
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2
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8
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9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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Pin No.
Pin Name
I/O
Description
-49-
–
I/O
–
I/O
–
I
I
–
I
–
–
I
I
I
I
–
I/O
–
I/O
–
Power Supply (+3.3 V)
Data-In / Data-Out
Power Supply (+3.3 V)
Data-In / Data-Out
Not used
Write Enable
Row Address Strobe
Not used
Address Input
Power Supply (+3.3 V)
Ground (0 V)
Address Input
Output Enable
Column Address Strobe
Column Address Strobe
Not used
Data-In / Data-Out
Ground (0 V)
Data-In / Data-Out
Ground (0 V)
1
2 ~ 5
6
7 ~ 10
11, 12
13
14
15
16 ~ 19
20
21
22 ~ 26
27
28
29
30
31 ~ 34
35
36 ~ 39
40
VCC
DQ0 ~ DQ3
VCC
DQ4 ~ DQ7
NC
______
WE
________
RAS
NC
A0 ~ A3
VCC
GND
A4 ~ A8
_____
OE
__________
UCAS
__________
LCAS
NC
DQ8 ~ DQ11
GND
DQ12 ~ DQ15
GND
IC DESCRIPTION - 3/11 (GLT441L16-40)-1/1
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9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
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Pin No.
Pin Name
I/O
Description
-50-
–
I/O
–
I/O
–
I/O
–
I/O
–
I
I
I
I
I
–
–
I
–
3.3 V is applied. (VCC is for the internal circuit.)
Data is input and ouput from these pins. These pins are the same as those of a conventional
DRAM.
Ground is connected. (VSSQ is for the output buffer.)
Data is input and ouput from these pins. These pins are the same as those of a conventional
DRAM.
3.3 V is applied. (VCCQ is for the output buffer.)
Data is input and ouput from these pins. These pins are the same as those of a conventional
DRAM.
Ground is connected. (VSSQ is for the output buffer.)
Data is input and ouput from these pins. These pins are the same as those of a conventional
DRAM.
3.3 V is applied. (VCCQ is for the output buffer.)
DQM controls input/output buffers.
- Read operation: If DQM is High, The output buffer becomes High-Z. If the DQM is Low, the
output buffer becomes Low-Z.
- Write operation: If DQM is High, the previous data is held (the new data is not written). If
DQM is Low, the data is written.
Although these pin names are the same as those of conventional DRAMs, they function in a
different way. These pins define operation commands (read, write, etc.) depending on the
combination of their voltage levels. For details, refer to the command operation section.
____
____
When CS is Low, the command input cycle becomes valid. When CS is high, all inputs are
ignored. However, internal operations (bank active, burst operations, etc.) are held.
A11 is a bank select signal (BS). The memory array of the GM72V161621ET/ELT Series is
divided into bank 0 and bank 1. GM72V161621ET/ELT Series contain 2048 row x 256 column x
16bits. If A11 is Low, bank 0 is selected, and if A11 is High , bank 1 is selected.
Row address (AX0 to AX10) is determined by A0 to A10 level at the bank active command
cycle CLK rising edge. Column address is determined by A0 to A7 level at the read or write
command cycle CLK rising edge. And this column address becomes burst access start address.
A10 defines the precharge mode. When A10 = High at the precharge command cycle, both banks
are precharged. But when A10 = Low at the precharge command cycle, only the bank that is
selected by A11 ( BS) is precharged.
3.3 V is applied. (VCC is for the internal circuit.)
Ground is connected. (VSS is for the internal circuit.)
Row address (AX0 to AX10) is determined by A0 to A10 level at the bank active command
cycle CLK rising edge. Column address is determined by A0 to A7 level at the read or write
command cycle CLK rising edge. And this column address becomes burst access start address.
A10 defines the precharge mode. When A10 = High at the precharge command cycle, both banks
are precharged. But when A10 = Low at the precharge command cycle, only the bank that is
selected by A11 ( BS) is precharged.
Not used.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
VCC
DQ0
DQ1
VSSQ
DQ2
DQ3
VCCQ
DQ4
DQ5
VSSQ
DQ6
DQ7
VCCQ
LDQM
_____
MWE
_______
CAS
________
RAS
___
CS1
MA11
MA10
MA0
MA1
MA2
MA3
VCC
GND
MA4
MA5
MA6
MA7
MA8
MA9
NC
IC DESCRIPTION - 4/11 (GM72V161621ET-7)-1/2
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9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
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Pin No.
Pin Name
I/O
Description
-51-
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
CKE
CLK
UDQM
NC
VCCQ
MD8
MD9
VSSQ
MD10
MD11
VCCQ
MD12
MD13
VSSQ
MD14
MD15
GND
I
I
I
–
–
I/O
–
I/O
–
I/O
–
I/O
–
This pin determines whether or not the next CLK is valid. If CKE is High, the next CLK rising
edge is valid. If CKE is Low, the next CLK rising edge is invalid. This pin is used for power-
down and clock suspend modes.
CLK is the master clock input to this pin. The other input signals are referred at CLK rising edge.
DQM controls input/output buffers.
- Read operation: If DQM is High, The output buffer becomes High-Z. If the DQM is Low, the
output buffer becomes Low-Z.
- Write operation: If DQM is High, the previous data is held (the new data is not written). If
DQM is Low, the data is written.
Not used
3.3 V is applied. (VCCQ is for the output buffer.)
Data is input and ouput from these pins. These pins are the same as those of a conventional
DRAM.
Ground is connected. (VSSQ is for the output buffer.)
Data is input and ouput from these pins. These pins are the same as those of a conventional
DRAM.
3.3 V is applied. (VCCQ is for the output buffer.)
Data is input and ouput from these pins. These pins are the same as those of a conventional
DRAM.
Ground is connected. (VSSQ is for the output buffer.)
Data is input and ouput from these pins. These pins are the same as those of a conventional
DRAM.
Ground is connected. (VSS is for the internal circuit.)
IC DESCRIPTION - 4/11 (GM72V161621ET-7)-2/2
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9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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Pin No.
Pin Name
I/O
Description
-52-
I
I
–
–
–
I
–
–
–
O
O
O
O
O
–
–
O
I
I
I
Latch Enable for Software Mode/Sampling Rate Selection for Hardware Mode. When MODE
pin is LOW, ML is selected.(1)
Mode Control Select. When this pin is HIGH, device is operated in hardware mode using SR0
(pin 1), FS0 (pin 19), and FS1 (pin 20). When this pin is LOW, device is operated in software
mode by three-wire interface using ML (pin 1), MD (pin 19) and MC (pin 20).(1)
Digital Power Supply, +5V.
Digital Ground.
27MHz Crystal. When an external 27MHz clock is applied to XT1 (pin 6), this pin must be
connected to GND.
27MHz Oscillator Input/External 27MHz Input.
Ground for PLL.
Power Supply for PLL, +5V.
Reserved. Must be left open.
27MHz Output.
Inverted 27MHz Output.
Fixed 33.8688MHz Clock Output.
768fS Clock Output.
256fS Clock Output.
Digital Ground for VDDB.
Digital Power Supply for Clock Output Buffers, +3.3V.
384fS Output. This output has been optimized for the lowest jitter and should be connected to the
audio DAC(s).
Reset. When this pin is LOW, device is held in reset.(1)
Serial Data Input for Software Mode/Sampling Frequency Selection for Hardware Mode. When
MODE pin is LOW, MD is selected.(1)
Shift Clock Input for Software Mode/Sampling Frequency Selection for Hardware Mode. When
MODE pin is LOW, MC is selected.(1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
D PLL L
MODE
VDD
GND
XT2
XT1
GNDP
VDDP
RSV
MCKO
MPEG CLK
SCKO1 MCK
SCKO4
SCKO2
GNDB
VDDB
DA XCK
RESET
S DATA
S CLK
IC DESCRIPTION - 5/11(PLL1700E)-1/1
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9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
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Pin No.
Pin Name
I/O
Description
-53-
I
I
I
O
I
O
–
–
–
–
O
–
O
–
–
O
–
O
–
–
O
I
I
I
I
I
I
I
Left and Right Clock Input. This clock is equal to the sampling rate - fS.(1)
Serial Audio Data Input. (1)
Bit Clock Input for Serial Audio Data.(1)
Buffered Output of Oscillator. Equivalent to System Clock.
Oscillator Input (External Clock Input)
Oscillator Output
Digital Ground
Digital Power +5V
Analog Power +5V
Analog Ground
Rch, Common Pin of Analog Output Amp
Not used
Rch, Analog Voltage Output of Audio Signal
Analog Ground
Analog Power +5V
Lch, Analog Voltage Output of Audio Signal
Not used
Lch, Common Pin of Analog Output Amp
Analog Ground
Analog Power +5V
Zero Data Flag
Reset. When this pin is low, the DF and modulators are held in reset. (2)
Chip Select/Input Format Selection. When this pin is low, the Mode Control is effective. (3)
Mode Control Select. (H: Software, L: Hardware). (2)
Mute Control
Mode Control, DATA/De-emphasis Selection 1. (2)
Mode Control, BCK/De-emphasis Selection 2. (2)
Mode Control, WDCK/Input Format Selection. (2)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
LRCIN
DIN
BCKIN
CLKO
XTI
XTO
DGND
VDD
VCC2R
AGND2R
EXTR
NC
VOUTR
AGND1
VCC1
VOUTL
NC
EXTL
AGND2L
VCC2L
ZERO
_______
RST
_____
CS/IWO
MODE
____________
MUTE
MD/DM0
MC/DM1
ML/IIS
NOTES: (1) Pins 1, 2, 3; Schmitt Trigger input.
(2) Pins 22, 24, 25, 26, 27, 28; Schmitt Trigger input with pull-up resister.
(3) Pin 23; Schmitt Trigger input with pull-down resister.
IC DESCRIPTION - 6/11 (PCM1716E)-1/1
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2
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9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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Pin No.
Pin Name
I/O
Description
-54-
I
I
–
I
I
–
I
I
I
–
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
I
I
Addresses
Addresses
Not used
Write Enable
Reset
Not used
Addresses
Addresses
Chip Enable
Ground
Output Enable
Data Inputs/Outputs
Data Inputs/Outputs
I/O15 (Data Input/Output, Word Mode) A-1 (LSB Address Input, Byte Mode)
Ground
Selects Byte or Word Mode
Addresses
A16 ~ A9
A20
NC
_______
WE
____________
RESET
NC
A18, A17
A7 ~ A0
_____
CE
GND
_____
OE
I/O0
I/O8
I/O1
I/O9
I/O2
I/O10
I/O3
I/O11
VCC
I/O4
I/O12
I/O5
I/O13
I/O6
I/O14
I/O7
I/O15/A-1
GND
___________
BYTE
A17
1 ~ 8
9
10
11
12
13 ~ 15
16, 17
18 ~ 25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
IC DESCRIPTION - 7/11 (AT49F8192A-90TC)-1/1
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9
2
8
9
4
2
9
8
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9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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Pin No.
Pin Name
I/O
Description
-55-
–
I/O
–
I/O
–
I
I
–
I
–
–
I
O
I
I
–
I/O
–
I/O
–
+5V Supply
Data Input, Output
+5V Supply
Data Input, Output
Not used
Write Enable
Row Address Strobe
Not used
Address Inputs
+5V Supply
0V Supply (GND)
Address Inputs
Output Enable
Column Address Strobe Upper Byte Control
Column Address Strobe Lower Byte Control
Not used
Data Input, Output
0V Supply
Data Input, Output
0V Supply
1
2 ~ 5
6
7 ~ 10
11, 12
13
14
15
16 ~ 19
20
21
22 ~ 26
27
28
29
30
31 ~ 34
35
36 ~ 39
40
VCC
D00 ~ D03
VCC
D04 ~ D07
NC
______
WE
________
RAS
NC
A01 ~ A04
VCC
VSS
A05 ~ A09
_____
OE
_____
CASH
_____
CASL
NC
D08 ~ D11
VSS
D12 ~ D15
VSS
IC DESCRIPTION - 8/11 (V53C16256HK50)-1/1
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2
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9
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2
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8
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9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
Pin No.
Pin Name
I/O
Description
-56-
I
I
I
O
–
I
I
O
–
I
O
–
I
I
I
I
I
I
I
I
I/O
I
I
I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
______
Select DOWN SW input from SW914
Enter SW input from SW910
Select right SW input SW911
Not used.
Not used. (TEST port)
Reset signal input from IC902 3pin
Not used. (Input for 32.768 kHz crystal oscillation)
Not used. (Output for 32.768 kHz crystal oscillation)
Ground
Ceramic resonator X501 (6 MHz) oscillation input
Ceramic resonator X501 (6 MHz) oscillation output
Vcc (5 V)
Key in input from SW901 ~ SW908
Reserved
Shuttle 3 line A/D input
Reserved
“LOW” at program download mode
Request signal (active “LOW”) from IC501 (Main µ-COM, HD64173034AFI20)
Not used.
Remocon receiver signal input
VFD display control signal output. DIG901 G1 to G7
VFD display control signal output. DIG901 P1 to P9
Vcc (5 VAU)
-24 V input
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
P35
P36
P37
PWM1
TEST1
_______
RES
XT1
XT2
VSS
CF1
CF2
VDD
P80
P81
P82
P83
P84
P85
P86
P87
MODE SW
M REQ
P72
P73
G1
G2
G3
G4
G5
G6
G7
P1
P2
P3
P4
P5
P6
P7
P8
P9
VPP
VKK
IC DESCRIPTION - 9/11(LC866112B-5N21)-1/2
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QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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Pin No.
Pin Name
I/O
Description
-57-
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
S26
S27
S28
S29
S30
S31
P00
P01
P02
P03
P04
P05
ZOOM RST
V07
VSS
P10
P11
P12
RXDO
TXDO
SCKO
F REQ
M RESET
PWR CTL
P31
P32
P33
P34
O
O
O
O
O
O
O
O
O
O
–
–
–
–
–
–
–
–
–
–
–
–
I/O
–
–
–
–
–
O
I
I
O
O
O
I/O
I
I
I
VFD display control signal output. DIG 901 P10 to P19
Not used.
D902 option (Present at AIWA remocon model)
Not used.
Diode option input
Not used.
Reserved
Not used
Not used
Ground
Reserved
Serial data to IC501 (Main µ-COM)
Serial data input from IC501 (Main µ-COM)
Serial clock input from IC501 (Main µ-COM)
Request signal (active “LOW”) to IC501 (main µ-COM)
Reset signal (active “LOW”) to IC501 (main µ-COM)
Power control (active “HIGH”) to main board
Not used.
UP signal input from SW912
Jog signal “JSW1” input, Not used
Left signal input from SW915
IC DESCRIPTION - 9/11(LC866112B-5N21)-2/2
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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Pin No.
Pin Name
I/O
Description
-58-
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Bi-directional data to DRAM
Digital ground
Address output to DRAM
Address output to DRAM
Address output to DRAM
Address output to DRAM
Digital power supply
Address output to DRAM
Address output to DRAM
Address output to DRAM
Address output to DRAM
Address output to DRAM
Master clock from oscillator for 2x decoding
Digital GND
Master clock from oscillator
Digital power supply
Row address strobe to DRAM
Column address upper byte control strobe to DRAM
Column address lower byte control strobe to DRAM
Write enable signal to DRAM
Output enable signal to DRAM
Scan data input
Test mode selection (low for normal)
Test output (Not used)
Test output (Not used)
Test output (Not used)
Test output (Not used)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
DAT8
DAT9
DAT10
DAT11
DAT12
DAT13
DAT14
DAT15
DAT16
VSS
ADD1
ADD2
ADD3
ADD4
VDD
ADD5
ADD6
ADD7
ADD8
ADD9
X2_MCK
VSS
MCK
VDD
RAS
UCAS
LCAS
WE
OE
SCAN_IN
TEST_SE
TEST_OUT12
TEST_OUT11
TEST_OUT10
TEST_OUT9
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
O
O
O
O
–
O
O
O
O
O
I
–
I
–
O
O
O
O
O
I
I
O
O
O
O
IC DESCRIPTION - 10/11(GDC25D801C)-1/5
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QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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Pin No.
Pin Name
I/O
Description
-59-
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
TEST_OUT8
TEST_OUT7
TEST_OUT6
T_SEL
TEST_OUT5
TEST_OUT4
TEST_OUT3
TEST_OUT2
TEST_OUT1
TEST_OUT0
TEST_SEL0
TEST_SEL1
TEST_SEL2
TEST_SEL3
TESTSERVO
E_SIN
E_CLK
E_ENB
E_DRB
VSS
SERVO_CLK
E_SOUT
VDD
E_ST0
E_ST1
E_ST2
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VSS
SENS
VDD
SCLK
SDATA
XLAT
AOUT1
AOUT2
O
O
O
I
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
–
I
O
–
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
O
–
I
I
I
O
O
Test output (Not used)
Test output (Not used)
Test output (Not used)
Test mode selection
Test output (Not used)
Test output (Not used)
Test output (Not used)
Test output (Not used)
Test output (Not used)
Test output (Not used)
Test mode output selection
Test mode output selection
Test mode output selection
Test mode output selection
TEST PIN ( NORMAL STATE = H )
SERVO DSP PGM. DOWNLOADING DATA INPUT
SERVO DSP PGM. DOWNLOADING CLK
SERVO DSP DOWNLOADING ENABLE
SERVO DSP PGM. DOWNLOADING DIRECTION
Digital GND
SERVO DSP CLOCK INPUT
SERVO DSP PGM. DOWNLOADING DATA OUTPUT
Digital power supply
SERVO DSP DOWNLOADING STATUS 0 (Not used)
SERVO DSP DOWNLOADING STATUS 1 (Not used)
SERVO DSP DOWNLOADING STATUS 2 (Not used)
SERVO DSP GENERAL I/O: FSON(FOCUS OK INVERTING)
SERVO DSP GENERAL I/O: PSEL
SERVO DSP GENERAL I/O: ADADDR3
SERVO DSP GENERAL I/O: FKRST
SERVO DSP GENERAL I/O: FKSET (Not used)
SERVO DSP GENERAL I/O: FEL
SERVO DSP GENERAL I/O (Not used)
SERVO DSP GENERAL I/O: DSP_SENSE (Not used)
Digital GND
SERVO DSP INTERNAL STATUS MONITOR
Digital power supply
Serial Command CLOCK
Serial Command DATA
Serial Command LATCH
FDO
TDO
IC DESCRIPTION - 10/11(GDC25D801C) - 2/5
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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Pin No.
Pin Name
I/O
Description
-60-
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
AVDD
VCM
AGND
AOUT3
AOUT4
DGND
RFVCM
VDD
AGND
VREFN
VREFP
INP
AGND
AIN4
AIN3
AVDD
AIN2
AIN1
AIN0
ADCVCM
SCK
EXT_AD0
EXT_AD1
EXT_AD2
EXT_AD3
EXT_AD4
EXT_AD5
SELEFM
EXCK
SQCK
C16M
DOTX
VDD
SQSO
VSS
PWMCH1
PWMCH2
PWMCH3
PWMCH4
PWMCH5
PWMCH6
DEFECT_IN_A
–
O
–
O
O
–
I
–
–
I
I
I
–
I
I
–
I
I
I
I
O
I
I
I
I
I
I
I
I
I
O
O
–
O
–
O
O
O
O
O
O
I
Analog power supply for ADC
TDF
Analog GND for ADC
FMQ
D_VREF
Digital GND for ADC
TDF
Analog GND for ADC
TDF
TDF
TDF
TDF
Analog GND for ADC
TDF
TDF
Analog power for ADC
TDF
TDF
TDF
TDF
PLL clock output
ADC data input
ADC data input
ADC data input
ADC data input
ADC data input
ADC data input
EFMDATA INPUT SELECTION
SUB DATA REQUEST INPUT (Not used)
SUB Q DATA REQUEST
5.6448 MHz(DIGITAL OUT CLOCK) (Not used)
CD DIGITAL DATA OUTPUT (Not used)
Digital power supply
SUB Q DATA OUTPUT
Digital GND
PWM CHANNEL1(x3 CARRIER)
PWM CHANNEL1(x3 CARRIER)
PWM CHANNEL1(x3 CARRIER):SLED DRIVE OUTPUT
PWM CHANNEL1(x1 CARRIER):PDO_CTR PWM OUTPUT
PWM CHANNEL1(x1 CARRIER):RF_GAIN_CTL PWM OUTPUT
PWM CHANNEL1(x1 CARRIER):TE_BAL_CTL PWM OUTPUT
EXTERNAL DEFECT INPUT PIN
IC DESCRIPTION - 10/11(GDC25D801C) - 3/5
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QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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http://www.xiaoyu163.com
Pin No.
Pin Name
I/O
Description
-61-
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
SI_ENC1
SI_ENC2
TZC
MIRR
MSDATAO
FOK
VDD
DEFECT
VSS
SLD_FG
C_SIG
COMP
INT1
INT2
VSS
INT3
INT4
VDD
ADCSB
ADCOMP_
VDCDATA0
VDCDATA1
VDCDATA2
VDCDATA3
VDCDATA4
VDCDATA5
VDCDATA6
VDCDATA7
ADADDR0
DVDD
ADADDR1
DGND
AGND
VRT
AVDD
RF
VRM
VRB
MDS
MDP
OVER64
I
I
I
I
O
O
–
O
–
O
O
O
O
O
–
O
O
–
O
I
I
I
I
I
I
I
I
I
O
–
O
–
–
I
–
I
I
I
O
O
O
SLED ENCODER1 INPUT
SLED ENCODER2 INPUT
TRACK CROSS PULSE 2 INPUT
TRACK CROSS PULSE 1 INPUT
SERVO DSP INTENAL STATUS SERIAL OUTPUT
INTERNAL GENERATED FOK(Focus OK) H=OK
Digital power supply
INTERNAL GENERATED DEFECT : H=DEFECT
Digital GND
SLD_FG=(SL_ENC1) XOR (SL_ENC2)
TRACK CROSS PULSE
TRACK CROSS MONITOR
SERVO DSP INTERRUPT 1 MONITOR(MICOM COMMAND INT)
SERVO DSP INTERRUPT 2 MONITOR(FOCUS SERVO INT)
Digital GND
SERVO DSP INTERRUPT 1 MONITOR(TRACK SERVO INT)
SERVO DSP INTERRUPT 1 MONITOR
Digital power supply
PLESSY D/A CHIP SELECTION
A/D 7824 A/D CONVERTER A/D CONVERSION END STATUS
A/D 7824 A/D CONVERTER DATA BUS0
A/D 7824 A/D CONVERTER DATA BUS1
A/D 7824 A/D CONVERTER DATA BUS2
A/D 7824 A/D CONVERTER DATA BUS3
A/D 7824 A/D CONVERTER DATA BUS4
A/D 7824 A/D CONVERTER DATA BUS5
A/D 7824 A/D CONVERTER DATA BUS6
A/D 7824 A/D CONVERTER DATA BUS7
A/D 7824 A/D CONVERTER ADDRESS
Digital power supply for ADC
A/D 7824 A/D CONVERTER ADDRESS
Digital GND for ADC
Analog GND for ADC
TDF
Analog power supply for ADC
TDF
TDF
TDF
Spindle motor control signal (Not used)
Spindle motor control signal
Spindle motor reversal sensing signal output (Not used)
IC DESCRIPTION - 10/11(GDC25D801C) - 4/5
www. xiaoyu163. com
QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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http://www.xiaoyu163.com
Pin No.
Pin Name
I/O
Description
-62-
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
MON
LOCK
FG_M
VSS
SCAN_OUT
VDD
INT
RN
WN
CS
A0
A1
A2
A3
A4
A5
VSS
PS0
VDD
PS1
PS2
PS3
PS4
PS5
PS6
PS7
RESET
REQ_DIVX
REQ_MPEG
MPEG1
MPEG2
MPEG3
MPEG4
MPEG5
MPEG6
MPEG7
MPEG8
SENB
SDCLK
SERR
SYNC
O
O
I
–
O
–
O
I
I
I
I
I
I
I
I
I
I
I/O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
O
O
O
O
O
O
O
O
O
O
O
O
Spindle motor ON/OFF control signal
CLV servo lock signal
TDF
Digital GND
SCAN DATA OUTPUT (Not used)
Digital power supply
Interrupt request to Host
Read strobe from HOST
Write strobe from HOST
Chip select from HOST
Internal register address from HOST
Internal register address from HOST
Internal register address from HOST
Internal register address from HOST
Internal register address from HOST
Internal register address from HOST
Digital GND
Bi-directional data to Host
Digital power supply
Bi-directional data to Host
Bi-directional data to Host
Bi-directional data to Host
Bi-directional data to Host
Bi-directional data to Host
Bi-directional data to Host
Bi-directional data to Host
HARDWARE RESET
Data request from DIVX module (Not used)
Data request from MPEG
MPEG data
MPEG data
MPEG data
MPEG data
MPEG data
MPEG data
MPEG data
MPEG data
MPEG data valid signal (low for valid)
MPEG data transfer clock
MPEG data error detection signal (low indicates error occurred)
SERVO DSP INTERRUPT 1 MONITOR(MICOM COMMAND INT) (Not used)
IC DESCRIPTION - 10/11(GDC25D801C) - 5/5
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
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Pin No.
Pin Name
I/O
Description
-63-
IC DESCRIPTION - 11/11(ZIVA4.1) - 1/5
Read strobe in I mode. Must be held HIGH in M Mode.
____
Read/write strobe in M mode. Write strobe in I mode. Host asserts R/W LOW to select Write and
LOW to select Read for M Mode only.
3.3-V supply voltage for I/O signals.
Transfer not complete / data acknowledge. Active LOW to indicate host initiated transfer is not
___________
____
complete. WAIT is asserted after the falling edge of CS and reasserted when decoder is ready to
complete transfer cycle. Open drain signal, must be pulled-up via 1k ohm to 3.3 volts. Driven
high for 10 ns before tristate.
Active Low Reset. Assert for at least 5-milliseconds in the presence of clock to reset the entire
chip.
Ground for core logic and I/O signals.
3.3/5-V supply voltage for I/O signals.
Host interrupt. Open drain signal, must be pulled-up via 4.7k ohm to 3.3 volts. Driven high for
10 ns before tristate.
Not used
2.5-V supply voltage for core logic.
Ground for core logic and I/O signals.
Not used
Ground for core logic and I/O signals.
3.3/5-V supply voltage for I/O signals.
Video data bus. Byte serial CbYCrY data synchronous with VCLK. At power-up, the decoder
does not drive VDATA. During boot-up, the decoder uses configuration parameters to drive or 3-
state VDATA.
Vertical sync. Bi-directional, the decoder outputs the top border of a new field on the first
_____________
______________ ______________
HSYNC after the falling edge of VSYNC. VSYNC can accept vertical synchronization or top/
______________
______________
bottom field notification from an external source. (VSYNC HIGH = bottom field. VSYNC LOW
= Top field)
Horizontal sync. The decoder begins outputting pixel data for a new horizontal line after the
_____________
falling (active) edge of HSYNC.
Ground for core logic and I/O signals.
3.3/5-V supply voltage for I/O signals.
Not used
2.5-V supply voltage for core logic.
Ground for core logic and I/O signals.
Not used
Programmable I/O pins.
Ground for core logic and I/O signals.
3.3/5-V supply voltage for I/O signals.
Programmable I/O pins.
SDRAM Data
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
1
2
3
4
5
6
7
8
9 ~ 12
13
14
15 ~ 18
19
20
21 ~ 28
29
30
31
32
33 ~ 35
36
37
38 ~ 42
43
44
45
46 ~ 52
53, 54
55
56
_____
RD
____
R/W
VDD_3.3
___________
WAIT
____________
RESET
VSS
VDD_3.3_5
_______
INT
NC
VDD_2.5
VSS
NC
VSS
VDD_3.3_5
VDATA0 ~
VDATA7
_______
VSYNC
_______
HSYNC
VSS
VDD_3.3_5
NC
VDD_2.5
VSS
NC
PIO0
VSS
VDD_3.3_5
PIO1 ~ PIO7
MDATA0, MDATA1
VDD_3.3
VSS
I
I
–
O
I
–
–
O
O
–
–
O
–
–
O
I/O
I/O
–
–
O
–
–
O
I/O
–
–
I/O
I/O
–
–
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QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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Pin No.
Pin Name
I/O
Description
-64-
IC DESCRIPTION - 11/11(ZIVA4.1) - 2/5
57 ~ 62
63
64
65
66
67
68
69 ~ 73
74
75
76
77
78
79
80, 81
82
83
84 ~ 86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102 ~ 104
105
106 ~ 111
112
113
114
115
116
MDATA2 ~ MDATA7
MDATA15
VDD_3.3
VSS
MDATA14
VDD_2.5
VSS
MDATA13 ~ MDATA9
VDD_3.3
VSS
MDATA8
LDQM
SD-CLK
CLKSEL
MADDR9, MADDR8
VDD_3.3
VSS
MADDR7 ~ MADDR5
VDD_2.5
VSS
MADDR4
__________
MWE
______________
SD-CAS
VDD_3.3
VSS
______________
SD-RAS
_____________
SD-CS0
_____________
SD-CS1/MADDR11
____________
SD-BS
MADDR10
MADDR0
VDD_3.3
VSS
MADDR1 ~ MADDR3
VSS ADC
NC
DAI XCK
DAI-LRCK
DAI-BCK
VDD_3.3
VSS
I/O
I/O
–
–
I/O
–
–
I/O
–
–
I/O
O
O
I
O
–
–
O
–
–
O
O
O
–
–
O
O
O
O
O
O
–
–
O
I
–
I
I
I
–
–
SDRAM Data
SDRAM Data
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
SDRAM Data
2.5-V supply voltage for core logic.
Ground for core logic and I/O signals.
SDRAM Data
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
SDRAM Data
SDRAM Lower or Upper Mask
SDRAM Clock
Selects SYSCLK or VCLK as clock source. Normal operation is to tie HIGH.
SDRAM Address
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
SDRAM Address
2.5-V supply voltage for core logic.
Ground for core logic and I/O signals.
SDRAM Address
SDRAM Write Enable
Active LOW SDRAM Column Address
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
Active LOW SDRAM Row Address
Active LOW SDRAM Chip Select 0
Active LOW SDRAM Chip Select 1 or use as MADDR11 for larger SDRAM (64 Mbits).
SDRAM Bank Select
SDRAM Address
SDRAM Address
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
SDRAM Address
Not used
Not used
Tie to VSS or VDD_3.3
PCM left/right clock.
PCM input bit clock.
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
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Pin No.
Pin Name
I/O
Description
-65-
IC DESCRIPTION - 11/11(ZIVA4.1) - 3/5
117
118 ~ 121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
DAI-DATA
DA-DATA3~ DA-DATAO
DA-LRCK
VDD_3.3
VSS
DA-XCK
DA-BCK
DA-IEC
VDD_2.5
VSS
NC
VSS_DAC
VSS_VIDEO
CVBS +sync
VDD_DAC
VDD_VIDEO
NC
VSS_DAC
VSS_VIDEO
CVBS/G/Y
VDD_DAC
VDD VIDEO
NC
VSS_DAC
VSS_VIDEO
Y/B/U
VDD DAC
VDD_VIDEO
NC
VSS_DAC
VSS_VIDEO
C/R/V
VDD DAC
VDD_VIDEO
VSS_RREF
RREF
VDD_RREF
A_VSS
SYSCLK
I
O
O
–
–
I/O
O
O
–
–
–
–
–
O
–
–
–
–
–
O
–
–
–
–
–
O
–
–
–
–
–
O
–
–
–
I
–
–
I
PCM data input.
PCM Data Out. Eight channels. Serial audio samples relative to DA_BCK and DA_LRCK.
PCM Left Clock. Identifies the channel for each sample. The polarity is programmable.
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
Audio External Frequency Clock input or output. DA_BCK and DA_LRCK are derived from
this clock. DA_XCK can be 384 or 256 times the sampling frequency.
PCM Bit Clock. Divided by 8 from DA_XCK. DA_BCK can be either 48 or 32 times the
sampling frequency.
PCM data out in IEC-958 format or compressed data out in IEC-1937 format.
2.5-V supply voltage for core logic.
Ground for core logic and I/O signals.
Not used
Analog Video DAC Ground.
Analog Video Ground.
DAC video output format
3.3-V Analog Video Power.
3.3-V Analog Video Power.
Not used
Analog Video DAC Ground.
Analog Video Ground.
DAC video output format.
3.3-V Analog Video Power.
3.3-V Analog Video Power.
Not used
Analog Video DAC Ground.
Analog Video Ground.
DAC video output format
3.3-V Analog Video Power.
3.3-V Analog Video Power.
Not used
Analog Video DAC Ground.
Analog Video Ground.
DAC video output format
3.3-V Analog Video Power.
3.3-V Analog Video Power.
Analog Video Ground.
Reference Resistor. Connecting to pin 139 through a 4.7k ± 1% resistor is recommended
3.3-V Analog Video Power.
Analog PLL Ground.
Optional System Clock. Tie to A_VDD through a 1k Ohm resistor
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Pin No.
Pin Name
I/O
Description
-66-
IC DESCRIPTION - 11/11(ZIVA4.1) - 4/5
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182 ~ 184
185 ~ 187
188
VCLK
A_VDD
DVD-DATA0/CD-DATA
DVD-DATA1/
CD-LRCK
DVD-DATA2/
CD-BCK
DVD-DATA3/
CD-C2P0
DVD-DATA4/
CDG-SDATA
VSS
VDD_3.3
DVD-DATA5/
CDG-VFSY
DVD-DATA6/
CDG-SOS1
DVD-DATA7/
CDG-SCLK
VDACK
VREQUEST
VSTROBE
ERROR
VDD_3.3
RESERVED
VDD_3.3
VSS
NC
RESERVED
NC
HADDR0 ~ HADDR2
RESERVED
VSS
I
–
I
I
I
I
I
–
–
I
I
I
I
O
I
I
–
I
–
–
–
I
–
I
I
–
Video clock. Clocks out data on input. VDATA[7:0]. Clock is typically 27 MHz.
System clock that drives internal PLLs and internal DENC. ZiVA-4 requires an external 27-MHz
TTL oscillator.
3.3-V Analog PLL Power
Serial CD data. This pin is shared with DVD compressed data DVD-DATA0.
Programmable polarity 16-bit word synchronization to the decoder (right channel HIGH). This
pin is shared with DVD compressed data DVD-DATA1.
CD bit clock. Decoder accept multiple BCK rates. This pin is shared with DVD compressed data
DVD-DATA2.
Asserted HIGH indicates a corrupted byte. Decoder keeps the previous valid picture on-screen
until the next valid picture is decoded. This pin is shared with DVD compressed data DVD-
DATA3.
DVD parallel compressed data from DVD DSP. Or CD+G (Subcode) data indicating serial
subcode data input.
Ground for core logic and I/O signals.
3.3-V supply voltage for I/O signals.
DVD parallel compressed data from DVD DSP. Or CD+G (Subcode) Frame Sync indicating
frame-start or composite synchronization input.
DVD parallel compressed data from DVD DSP. Or CD+G (Subcode) Block Sync indicating
block-start synchronization input.
DVD parallel compressed data from DVD DSP. Or CD+G (Subcode) Clock indicating subcode
data clock input or output.
In synchronous mode, bitstream data acknowledge. Asserted when DVD data is valid. Polarity is
programmable.
Bitstream request. Decoder asserts VREQUEST to indicate that the bitstream input buffer has
available space. Polarity is programmable.
Bitstream strobe. Programmable dual mode pulse. Asynchronous and synchronous. In
Asynchronous mode, an external source pulses VSTROBE to indicate data is ready for transfer.
In synchronous mode, VSTROBE clocks data.
Error in input data. If ERROR signal is not available from the DSP it must be grounded.
3.3-V supply voltage for I/O signals.
Tie to VSS or VDD_3.3
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
Not used
Tie to VSS or VDD_3.3
Not used
Host address bus. 3-bit address bus selects one of eight host interface registers.
Tie to VSS or VDD_3.3
Ground for core logic and I/O signals.
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Pin No.
Pin Name
I/O
Description
-67-
189
190
191
192
193 ~ 196
197
198
199
200
201
202
203
204
205
206
207
208
VDD_2.5
RESERVED
VSS
VDD_3.3
RESERVED
HDATA7
VSS
HDATA6
HDATA5
HDATA4
HDATA3
HDATA2
VDD_3.3
VSS
HDATA1
HDATA0
____
CS
–
I
–
–
I
I/O
–
I/O
I/O
I/O
I/O
I/O
–
–
I/O
I/O
I
2.5-V supply voltage for core logic.
Tie to VSS or VDD_3.3.
Ground for core logic and I/O signals.
3.3-V supply voltage for I/O signals.
Tie to VSS or VDD_3.3.
HDATA[7] is the 8-bit bi-directional host data bus through which the host writes data to the
decoder Code FIFO. MSB of the 32-bit word is written first. The host also reads and writes the
decoder internal registers and local SDRAM/ROM via HDATA[7].
Ground for core logic and I/O signals.
HDATA[6 ~ 2] is the 8-bit bi-directional host data bus through which the host writes data to the
decoder Code FIFO. MSB of the 32-bit word is written first. The host also reads and writes the
decoder internal registers and local SDRAM/ROM via HDATA[6 ~ 2].
3.3-V supply voltage for I/O signals.
Ground for core logic and I/O signals.
HDATA[1, 0] is the 8-bit bi-directional host data bus through which the host writes data to the
decoder Code FIFO. MSB of the 32-bit word is written first. The host also reads and writes the
decoder internal registers and local SDRAM/ROM via HDATA[1, 0].
____
Host chip select. Host asserts CS to select the decoder for a read or write operation. The falling
edge of this signal triggers the read or write operation.
IC DESCRIPTION - 11/11(ZIVA4.1) - 5/5
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-68-
MECHANICAL EXPLODED VIEW 1/1
465
467
465
465
463
PWB
PWB
463
463
279
001
275
332
260
467
300
467
250
462
462
463
463
452
452
452
PWB
PWB
PWB
PWB
452
285
281
285
283
<EXCEPT FOR HR>
<HR ONLY>
283
280
280
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
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-69-
MECHANICAL MAIN PARTS LIST 1/1
REF. NO
PART NO.
KANRI
DESCRIPTION
NO.
001 S9-30R-018-5A0 HOLDER DIGITRON
250 S1-10R-018-4G0 CASE TOP<HRN,KN,EZN>
250 S1-10R-018-4A0 CASE TOP<UB,EZB>
260 ———— CHASSIS ASSY MAIN
275 S9-30R-018-3A0 HOLDER MAIN PCB
279 S9-30R-019-9A0 HOLDER CONNECTOR
280 S7-21R-F15-7B0 PANEL ASSY FRONT<HRN>
280 S7-21R-F15-7A0 PANEL ASSY FRONT<UB>
280 S7-21R-F15-7C0 PANEL ASSY FRONT<KN,EZN>
280 S7-21R-F15-7D0 PANEL ASSY FRONT<EZB>
281 S9-40R-V01-0A0 KNOB,VOLUME<HRN>
283 S5-81R-T00-6B0 DOOR ASSY TRAY<HRN,KN,EZN>
283 S5-81R-T00-6A0 DOOR ASSY TRAY<UB,EZB>
285 ———— PLATE ASSY
!
!
!
!
! 300 S4-10R-CHR-02C POWER CORD<HRN,EZB,EZN>
!
!
!
!
! 300 S4-10R-AHC-02B POWER CORD<UB>
!
!
!
!
! 300 S4-10R-LHR-02E POWER CORD<KN>
332 ———— PLATE MAIN
452 S3-530-51A-000 SCREW,SPECIAL
462 S3-530-85A-000 SCREW,DECORATION
463 S3-530-51B-000 SPECIAL SCREW
465 S3-530-46K-000 SPECIAL SCREW 3-10 B.K
467 S3-530-46N-000 SPECIAL SCREW 3-8 BK
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-70-
COLOR NAME TABLE
Basic color symbol
Color
Basic color symbol
Color
Basic color symbol
Color
B
Black
C
Cream
D
Orange
G
Green
H
Gray
L
Blue
LT
Transparent Blue
N
Gold
P
Pink
R
Red
S
Silver
ST
Titan Silver
T
Brown
V
Violet
W
White
WT
Transparent White
Y
Yellow
YT
Transparent Yellow
LM
Metallic Blue
LL
Light Blue
GT
Transparent Green
LD
Dark Blue
DT
Transparent Orange
GM
Metallic Green
YM
Metallic Yellow
DM
Metallic Orange
PT
Transparent Pink
LA
Aqua Blue
GL
Light Green
COLOR NAME TABLE
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8
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-71-
002
001
003
004
429
429
026
018
008
009
012
012
016
012
430
430
430
012
430
432
020
430
011
017
014
013
PWB
431
A01
A02
A03
DVD MECHANISM EXPLODED VIEW 1/1
w w w
.
x i a o y u 1 6 3 .
c o m
Q Q
3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
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5
1
5
1
3
6
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-72-
DVD MECHANISM MAIN PARTS LIST 1/1
REF. NO
PART NO.
KANRI
DESCRIPTION
NO.
001 S3-00R-054-7A0 PLATE CLAMP
002 ———— CLAMP MAGNET 8,10-5,1-1.5
003 ———— CLAMP UPPER
004 S9-30R-017-1A0 HOLDER CLAMP
008 S4-70R-004-7A0 GEAR ASSY RACK<HRN,UB,KN>
008 S4-70R-008-0A0 GEAR ASSY, RACK<EZB,EZN>
009 S4-70R-005-3A0 GEAR MIDDLE<HRN,UB,KN>
009 S4-70R-007-9A0 GEAR MIDDLE<EZB,EZN>
011 S2-11R-002-1B0 FRAME ASSY<HRN,UB,KN>
011 S2-11R-002-8A0 FRAME ASSY UP/DOWN<EZB,EZN>
012 ———— RUBBER REAR
013 S4-00R-000-6A0 BELT LOADING
014 S4-70R-005-5A0 GEAR PULLEY
016 S4-70R-005-0A0 GEAR ASSY FEED<HRN,UB,KN>
016 S4-70R-008-1A0 GEAR ASSY, PINION<EZB,EZN>
017 S4-70R-005-6A0 GEAR LOADING
018 S9-74R-002-3A0 GUIDE UP/DOWN
020 ———— BASE MAIN
026 S3-90R-000-5A0 TRAY DISC<HRN,UB,KN>
026 S3-90R-001-0A0 TRAY DISC<EZB,EZN>
429 SS-ZZR-001-2A0 SCREW,B-TITE
430 SS-ZZH-100-3A0 SCREW,+D2.0-6MM
431 87-741-035-410 SCREW,2.0-6
432 ———— SCREW,MACHINE
A01 S8-61R-000-6A0 CLAMP ASSY DISC
A02 S0-41R-001-0C0 BASE ASSY MAIN<HRN,UB,KN>
A02 S0-41R-002-0A0 BASE ASSY MAIN<EZB,EZN>
A03 S0-41R-001-7A0 BASE ASSY SLED<HRN,UB,KN>
A03 S0-41R-001-8A0 BASE ASSY SLED<EZB,EZN>
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-73-
ELECTRICAL TROUBLESHOOTING GUIDE -1/11
No 5V_D
or 5V_A .
No 5.2VA.
Is 5.2VA section working?
Is oscillation present at the
Base of Q108?
Replace Q108.
Check L103, C116, 117.
Replace BD101.
(Bridge rectifier)
Check Fuse(F101).
Is R111 0.5Ω?
Is 5.2V applied to IC102
Pin 1?
Is there a DC voltage at the
(+) terminal of BD101?
Check R127, 128.
(SHUTDOWN CKT)
1. Power(SMPS) Circuit
No VF+
Is 5.2VA section working?
Replace D109.
Is oscillation present at the
anode of D109?
NO
NO
NO
NO
YES
YES
YES
YES
YES
YES
YES
YES
A.
B.
NO
NO
NO
Replace R111.
Replace Q101, 102.
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ELECTRICAL TROUBLESHOOTING GUIDE -2/11
-74-
Replace IC506.
Refer to Front Part
Check short
Reconnect it.
2. µ-COM Circuit
A. No Power
Does Logo appear
on the screen?
Is oscillation of
X501 normal?
Are IC503 Pins 14, 288
and 29 normal?
Do all five Bars appear?
Does Bar appear at FLD?
Is P5901
connected normally?
Is P5901 Pin 24 normal?
The
waveform on A[00:21]
and D[00:15] of IC501
normal?
Are IC506 Pins 7, 8 normal?
Replace Main B/D.
Check the oscillation
Check short.
OK
Replace IC501
or IC503.
Check power.
(Refer to power)
If power is
normal
OK
POWER ON
1
1
YES
YES
YES
YES
YES
YES
YES
YES
A
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
A
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ELECTRICAL TROUBLESHOOTING GUIDE -3/11
-75-
B. Audio abnormal
D. Open/Close abnormal
Check the
connection of P5901.
Check IC501 Pins 13, 14.
Check Audio jack.
YES (If OK)
YES
NO
NO
YES
YES (If OK)
YES
YES (If OK)
YES (If OK)
YES (If OK)
Check PLL FC of MPEG part.
Refer to Audio part.
Refer to MPEG part.
Replace B/D.
Check Front.
Reconnect it.
Refer to SERVO part.
Check the connection of MD.
AUDIO ABNORMAL
OPEN/CLOSE ABNORMAL
C. Video abnormal
Check Video jack.
YES (If OK)
YES (If OK)
YES (If OK)
YES (If OK)
Refer to Video part.
Refer to Encoder part.
Refer to MPEG part.
Replace B/D.
VIDEO ABNORMAL
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ELECTRICAL TROUBLESHOOTING GUIDE -4/11
-76-
E. Picture abnormal
Check the disc.
If OK
YES (If OK)
YES (If OK)
Refer to Servo part
Check PLL IC of MPEG part
Check DSP
Check MPEG
YES (If OK)
Replace B/D
PICTURE ABNORMAL
F. Disc Error
Check Disc
YES (If OK)
YES (If OK)
Refer to Servo part
Replace B/D
DISC ERROR
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ELECTRICAL TROUBLESHOOTING GUIDE -5/11
-77-
Power is on
Does LG Logo appear
on the screen?
Does the
moving picture of the DVD Disc
play on the screen
normally?
Is MPEG data signal normal?
Is error signal normal?
Is MPEG data signal normal?
Is Clock normal?
Does the audio
sound output from MPEG
decoder?
Does the
moving picture of the video
CD play on the screen
normally?
Does the audio sound
output normally?
END
Check power & clock.
Check CD/DVD DSP output
signal.
Check MPEG Decoder input
signal.
Check CD/DVD DSP output
signal.
Check MPEG Decoder input
signal.
Check CD/DVD DSP output
signal.
Check MPEG Decoder input
signal.
Check clock signal
Check clock signal
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
NO
NO
NO
OK
OK
OK
OK
NO
NO
NO
NO
NO
3. MPEG Circuit
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ELECTRICAL TROUBLESHOOTING GUIDE -6/11
-78-
NO
NO
NO
START
Does remote control
work normally?
Do all the
buttons work
normally?
Check waveform of
IC901 Pin 13.
Check waveform
of IC901 Pin 2.
Is Digitron on normally?
LED ON?
Check waveform
of IC901 Pin 6.
Is oscillation of
X901 normal?
Is waveform of IC901
Pin 76 normal?
Check waveform
of IC901 Pin 13.
Does pulse
waveform of RC901 Pin 1
appear?
Is IC901
Pin 24 connected to
RC901 Pin 1 ?
Is RC901 Pin 2 5V?
Power on.
Check and replace
R903,R912, R904, R905,
R941, R906, R907.
Solder defective parts again.
Solder defective parts
Replace Q901.
Solder Key part.
Check Power.
Replace IC902.
Replace IC901.
Replace LED901.
Replace RC901.
Re-solder.
Recheck
Replace IC901.
Complete repairing Front B/D.
NO
NO
NO
NO
NO
NO
NO
NO
NO
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
CD
4. Front Circuit (Digitron & key)
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-79-
Does signal pulse
input to IC201 Pins 58, 59 when
the powe is on?
Does signal goes
"High" to IC201 Pin194 when the
power is on?
Does
TTL pulse output to
IC201 Pins 140, 142?
Does
33.8688MHz clock input
to IC201 Pin 63?
Is IC201
Pins 83, 84, 88, 89 voltage
about 2.2V?
Replace IC201
(IC206 soldering or IC defect).
Check power circuit.
Check "2.µ-COM Part".
Replace X301 or IC304
(30MHz clock defect)
CHECK POINT(General)
5. RF/Servo Circuit
A.
END
NO
NO
NO
NO
NO
YES
YES
YES
YES
YES
ELECTRICAL TROUBLESHOOTING GUIDE -7/11
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-80-
Does tray open or close?
Does the pick-up
slide inner or outer
track?
Fig.1. SLED Driver waveform
Fig.2. Focus Driver waveform
Does
the voltage change
at PMD04 Pins 1, 2 more than
2V on the basis of
3.8V?
Pressing
the open/close key
repeatedly, check the voltage of IC2M1
Pins 13, 14 change
0V to 5V
Does
PMD03 Pin 7 change
high to low?
Does
the pick-up lens move up
and down?
Check Focus Driver output.
(IC201 Pin 83, IC2M1 Pins 37, 38)
Check SLED Driver output.
IC201 Pin 88 IC2M1 Pins 28, 29.
IC201 Pin 88 no output : IC201 is defective
IC2M1 Pin 18 no output : IC2M1 is defective
IC201 Pin 83 no output : IC201 is defective
IC2M1 Pins 1, 2 no output : IC2M1 is defective
DECK assembly is defective.
Slide the pick-up to
inner track.
Power on
Check loading Part.
Push Pick-up to inner track to
the end by hand.
DECK assembly is defective.
(Limit sw)
check µ-COM Part.
Replace IC2M1.
No disc
B.
END
NO
NO
NO
NO
NO
NO
YES
YES
YES
YES
YES
YES
ELECTRICAL TROUBLESHOOTING GUIDE -8/11
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ELECTRICAL TROUBLESHOOTING GUIDE -9/11
-81-
FOCUS ON?
Check
the focus error moving the
lens up and down.
(IC2A1 Pin 42)
Does the
TTL level change at IC201
Pin 78 and 132 moving
the lens?
Does the disc turn?
IC201 Pin169 is "High"?
Is OK the track jump.
Does the signal
pulse appear at IC2A1 Pins
39, 29?
Does the screen appear?
OPEN/CLOSE
Replace µ-COM or IC201.
Replace IC201.
Check IC2A1 Pin 11,12,13,14
in DVD Mode
Fig.3. FOCUS ERROR waveform
IC201 no output : Pick-up is defective.
Check IC201 and IC2M1 when PMD03 Pin 6 is abnormal
Check IC2M1 Pin 21, PMD03
Pin 6 turn when the IC2M1
Pin 21 is less than 2.2V.
Check A
Video Part is defective.
Check "5.MPEG Circuit."
Check "7.OSD/Video Circuit."
Replace µ-COM part.
IC2A1 is defective.
DISC IN
C.
END
NO
NO
NO
NO
NO
NO
NO
NO
YES
YES
YES
YES
YES
YES
YES
YES
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ELECTRICAL TROUBLESHOOTING GUIDE -10/11
-82-
Is the eye-pattern vivid?
Does the
sawtooth waveform emit
at IC2A1 Pin 41?
Does the 1.6V emit?
Check RF Eye-Pattern.
RF : 1.5-1.6V(IC2A1 Pin 57)
Fig.5. RF
waveform
Check IC2A1 Pins 5, 6, 7, 8.
No signal: Pick-up is defective
Replace IC201.
Check IC201 Pin84.
No signal at IC201 : IC201 is defective
Check IC201 Pin 162.
Check the clock at the IC201 Pins 28, 30.
Both are normal : IC201 is defective
Replace IC2A1.
CHECK A
D.
END
NO
NO
NO
NO
YES
YES
YES
YES
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ELECTRICAL TROUBLESHOOTING GUIDE - 11/11
-83-
Replace IC301.
Replace the VR801,
VR802.
Is the Mic signal at the
IC802 Pin ?
Replace VR803.
Replace the IC4M1.
Check pattern.
Insert the Mic jack
Replace IC801.
Replace the mic jack
Start
NO
NO
NO
NO
NO
NO
YES
YES
YES
YES
1
Does the
signal change at the IC802
Pin if adjusting the VR803
(Echo VR)?
1
Is the Digital signal
output at the IC4M1
Pin ?
1
Does the
Mic signal input the IC301
Pin , , , ?
166
169
178
YES
YES
Is the Mic signal at the
IC802 Pin ?
2
Is the Mic signal
at the IC801 Pin ,
normal?
3
7
6. KARAOKE Circuit <EZ>
177
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-84-
DVD MECHANISM PARTS LOCATION <Except EZ>
Starting No.
1
1, 2
1, 2, 3
1, 2, 3, 4
1
1, 6
1, 2, 6
1, 2, 6, 8
1, 2, 6, 8,
9
1, 2, 7
1, 2, 7
1, 2
1, 2 ,13
1, 2, 13, 14
1, 2, 7, 12, 13, 14
1, 2, 13
1, 2, 7, 12, 13,
14, 15, 16, 17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Holder
Clamp
Clamp Assembly
Disc
Plate Clamp
Magnet Clamp
Clamp Upper
Tray Disc
Base Assembly Sled
Gear Assembly
Feed
Gear
Middle
Gear Assembly
Rack
Rubber Rear
Frame Assembly
Up/Down
Belt Loading
Gear Pulley
Gear Loading
Guide Up/Down
PWB Assembly
Loading
Base Main
2 Screws,
2 Locking Tabs
4 Screws,
1 Connector
1 Locking Tabs
1 Screw
1 Screw
1 Locking Tab
1 Locking Tab
1 Locking Tab
1 Hook
2Screw
2 Locking Tabs
4-1
4-1
4-1
4-1
4-1
4-2
4-3
4-3
4-3
4-3
4-3
4-4
4-4
4-4
4-4
4-4
4-4
4-4
Bottom
Bottom
Procedure
Parts
Fixing Type
Fig-
ure
Disass
embly
Note
When reassembling, perform the procedure in
reverse order.
The “Bottom” on Disassembly column of above
Table indicates the part should be disassembled
at the Bottom side.
• Top View (Without Tray)
• Bottom View
• Top View (With Tray)
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DVD MECHANISM DISASSEMBLY - 1/3 <Except EZ>
-85-
1.Holder Clamp (Fig. 4-1)
1) Release 2 Screws(S1).
2) Unhook 2 Locking Tabs(L1).
3) Lift up the Holder Clamp and then separate it from the
Base Main.
1-1. Clamp Assembly Disc
1) Place the Clamp Assembly Disc as Fig. (A)
2) Lift up the Clamp Assembly Disc in direction of
arrow(A).
3) Separate the Clamp Assembly Disc from the Holder
Clamp.
1-1-1. Plate Clamp
1) Turn the Plate Clamp to counterclockwise direction and
then lift up the Plate Clamp.
1-1-2. Magnet Clamp
1-1-3.Clamp Upper
2. Tray Disc (Fig. 4-2)
1) Insert and push a Driver in the emergency eject
hole(A) at the right side, or put the Driver on the
Lever(B) of the Gear Emergency and pull the Lever(B)
in direction of arrow so that the Tray Disc is ejected
about 15~20mm.
2) Pull the Tray Disc until it is separated from the Base
Main completely.
BASE MAIN
HOLDER CLAMP
HOLDER CLAMP
CLAMP ASSEMBLY DISC
HOLDER CLAMP
PLATE CLAMP
(S1)
(S1)
(A)
(L1)
(L1)
(Fig. A)
MAGNET CLAMP
CLAMP UPPER
(B)
LEVER
BOTTOM SIDE VIEW
EMERGENCY EJECT HOLE
(A)
TRAY DISC
BASE MAIN
BASE MAIN
Fig. 4-1
Fig. 4-2
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DVD MECHANISM DISASSEMBLY - 2/3 <Except EZ>
-86-
(L2)
(S2)
(C1)
(S2)
(S2)
(S2)
(S3)
GEAR ASSEMBLY RACK
PICK UP
ASSEMBLY
GENERAL
GEAR MIDDLE
GEAR ASSEMBLY FEED
BASE PU(OUTSERT)
RUBBER REAR
GEAR ASSEMBLY FEED
GEAR MIDDLE
GAER ASSEMBLY RACK
MOTOR ASSEMBLY SPINDLE
PICK UP ASSEMBLY GENERAL
MOTOR ASSEMBLY SPINDLE
3.Base Assembly Sled (Fig. 4-3)
1) Release 4 Screw(S2).
2) Disconnect the FFC Connector(C1)
3-1. Gear Assembly Feed
1) Unhook the Locking Tab(L2) in direction of arrow.
3-2. Gear Middle
3-3. Gear Assembly Rack
1) Release the Scerw(S3)
4. Rubber Rear (Fig. 4-3)
Fig. 4-3
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-87-
DVD MECHANISM DISASSEMBLY - 3/3 <Except EZ>
(B)
(S5)
(L6)
(L4)
(L5)
(A)
(L3)
(A)
(L6)
(H1)
(C2)
(L6)
FIG. (B)
GUIDE UP/DOWN
BASE MAIN
BASE MAIN
PWB ASSEMBLY LOADING
GEAR LOADING
BELT LOADING
FRAME ASSEMBLY UP/DOWN
GUIDE UP/DOWN
GUIDE UP/DOWN
GUIDE UP/DOWN
(A)
(B)
(S4)
FIG. (C)
FIG. (A)
(B)
(C)
GEAR PULLEY
Fig. 4-4
5. Frame Assembly Up/Down
Put the Base Main face down(Bottom Side)
1) Release the Screw(S4)
2) Unlock the Locking Tab(L3) in direction of arrow and
then lift up the Frame Assembly Up/Down to separate
it from the Base Main.
• When reassembling move the Guide Up/Down in direction
of arrow(C) until it is positioned as Fig.(C).
• When reassembling insert (A) portion of the Frame
Assembly Up/Down in the (B) portion of the Guide
Up/Down as Fig.(B)
6. Belt Loading(Fig. 4-4)
Put the Base Assembly Main on original position(Top Side)
7. Gear pulley (Fig. 4-4)
1) Unlock the Locking Tab(L4) in direction of arrow(B) and
then separate the Gear Pulley from the Base Main.
8. Gear Loading (Fig. 4-4)
9. Guide Up/Down (Fig. 4-4)
1) Move the Guide Up/Down in direction of arrow(A) as
Fig.(A)
2) Push the Locking Tab(L5) down and then lift up the
Guide Up/Down to separate it from the Base Main.
When reassembling place the Guide Up/Down as Fig.(C)
and move it in direction arrow(B) until it is locked by the
Locking Tab(L5). And confirm the Guide Up/Down as Fig.(A)
10. PWB Assembly Loading
Put the Base Main face down(Bottom Side)
1) Release 2 Screws(S5)
2) Unkool the Loading Motor Connector (C2) from the
Hook (H1) on the Base Main.
3) Unlock 2 Locking Tabs(L6) and separate the PWB
Assembly Loading from the Base Main.
11. Base Main(Fig. 4-4)
Note
Note
Note
Note
Note
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2–11, IKENOHATA 1–CHOME, TAITO-KU, TOKYO 110-8710, JAPAN TEL:03 (3827) 3111
920074
Printed in Singapore
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' |
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'pids' => '0,5',
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'dirname' => 'dnsj',
'pdirname' => 'hangye/',
'child' => 0,
'disabled' => '0',
'ismain' => 1,
'childids' => 12,
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'childids' => 13,
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'displayorder' => '0',
'icon' => '',
'index' => '2',
'mid' => 'wenku',
'pcatpost' => 0,
'topid' => '5',
'catids' =>
array (
0 => '13',
),
'is_post' => 1,
'tid' => 1,
'url' => 'http://www.wenhuiw.com/wenku/jtdl',
'total' => '请使用count标签查询',
'field' =>
array (
),
),
14 =>
array (
'id' => '14',
'pid' => '5',
'pids' => '0,5',
'name' => '机械设备',
'dirname' => 'jixie',
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'childids' => 14,
'thumb' => '',
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'setting' =>
array (
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'linkurl' => '',
'getchild' => '0',
'notedit' => '0',
'seo' =>
array (
),
'template' =>
array (
'pagesize' => '20',
'mpagesize' => '20',
'list' => 'list.html',
'category' => 'category.html',
'search' => 'search.html',
'show' => 'show.html',
),
'cat_field' => NULL,
'module_field' => NULL,
'urlrule' => 4,
'html' => 0,
'chtml' => 0,
),
'displayorder' => '0',
'icon' => '',
'index' => '2',
'mid' => 'wenku',
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'topid' => '5',
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array (
0 => '14',
),
'is_post' => 1,
'tid' => 1,
'url' => 'http://www.wenhuiw.com/wenku/jixie',
'total' => '请使用count标签查询',
'field' =>
array (
),
),
15 =>
array (
'id' => '15',
'pid' => '5',
'pids' => '0,5',
'name' => '能源动力',
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'childids' => 15,
'thumb' => '',
'show' => '1',
'setting' =>
array (
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'linkurl' => '',
'getchild' => '0',
'notedit' => '0',
'seo' =>
array (
),
'template' =>
array (
'pagesize' => '20',
'mpagesize' => '20',
'list' => 'list.html',
'category' => 'category.html',
'search' => 'search.html',
'show' => 'show.html',
),
'cat_field' => NULL,
'module_field' => NULL,
'urlrule' => 4,
'html' => 0,
'chtml' => 0,
),
'displayorder' => '0',
'icon' => '',
'index' => '2',
'mid' => 'wenku',
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'topid' => '5',
'catids' =>
array (
0 => '15',
),
'is_post' => 1,
'tid' => 1,
'url' => 'http://www.wenhuiw.com/wenku/nydl',
'total' => '请使用count标签查询',
'field' =>
array (
),
),
16 =>
array (
'id' => '16',
'pid' => '5',
'pids' => '0,5',
'name' => '电气工控',
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'childids' => 16,
'thumb' => '',
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'setting' =>
array (
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'linkurl' => '',
'getchild' => '0',
'notedit' => '0',
'seo' =>
array (
),
'template' =>
array (
'pagesize' => '20',
'mpagesize' => '20',
'list' => 'list.html',
'category' => 'category.html',
'search' => 'search.html',
'show' => 'show.html',
),
'cat_field' => NULL,
'module_field' => NULL,
'urlrule' => 4,
'html' => 0,
'chtml' => 0,
),
'displayorder' => '0',
'icon' => '',
'index' => '2',
'mid' => 'wenku',
'pcatpost' => 0,
'topid' => '5',
'catids' =>
array (
0 => '16',
),
'is_post' => 1,
'tid' => 1,
'url' => 'http://www.wenhuiw.com/wenku/dqgk',
'total' => '请使用count标签查询',
'field' =>
array (
),
),
) |
