A tF ^ 1 6 7 20 22 31 47 52 53 54 PIC,NEEFI E|.EC|TFICTNIC CCIFIPCIFIATICIN 4-1. M€surcl-chom€, ^r€surc-ku, Tokyo .sG, J.p.n U.E. FfCnalEl !-lC?lrEI\llCB C*tCCnaltqV AS Oxf63!- ro ruNER ( AM +B) PHONO T O T W E R ( I N O I C A T O R C I R C U I T , S Y N T H E S I Z E R C I R C U I T } TO TUNER, TONE AMP,EO AMP rO FREOUENCY FL INOICATOR CIRCUIT TO EO AMP, TONE AII,|P TO POIVER AMP IO FREOUENCY FL INDTCATOR TUSE )ro powee FL rNDrcaroR TUBE To ruNER (ruNER MEMofiy BAcKUp powER, I eowen FL tNDtcaroR ctRculr I 2. Tuning o Frequency is changed by 1 step for every push operation of the TUNING UP and TUNING DOWN keys. (Each push operation changes the frequency by 100kHz in the FM band, and by lkHz in the AM band). o Frequency scanning is achieved by depressing the TUNING UP or TUNING DOWN key continuously. o For auto scan tuning mode, set the tuning mode switch to the AUTO position and press either TUNING UP or TUNING DOWN key once. In this mode, the frequency band will be scanned automatically, coming to a stop when the frequency of a sufficiently strong broadcasting station (input level above a specific value) is tuned. . Preselected tuning by memory read-out (preset frequency read out from memory for direct tuning). 4. CIRCUIT DESCRIPTIONS 4.1 MAJOR FUNCTIONS OF TUNER SECTION The SX-D5000's tuner section is a crystal oscillator PLL Digital Synthesized Tuner. Major functions are enumerated briefly below. 1. Frequency Range FM: 87.5MHz to 108MHz Ln 100kHz steps. NOTE: The SX-DS000lSlG model is in 50kHz steps. AM: 525kHz to 1605kHz in lkHz steps (The auto scan tuning is stopped only at 10kHz integer multiples). NOTE: The SX-D5000 has been equipped with an AM CHANNEL STEP selector (1}kHz/9kHz). When set in the gkHz posi- tion, the 531kHz to 1602hHz frequency range is employed, and scan is stopped only at thHz integer multiples during auto scan tuning mode. HEADPHONES 7 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 3. Memory o A total of 6 FM frequencies and 6 AM fre- quencies may be stored in the memory. o Also auto memory of the previous tuned fre- quency when switching back and forth between FM and AM bands. o Last-one memory (the last frequency tuned when the power is switched off will be auto- matically retuned when the power is switched back on). o Memory maintained by a separate power supply when the main power is switched off (i.e. when the POWER switch is turned to STAND BY position). . Memory also maintained (for 3 to 4 days) when the power is turned off completely (i.e. when power cord is disconnected or a power failure occurs). 4. Indicators o The received frequency is displayed in digital form by fluorescent indicator tube. o Signal strength is indicated by the SIGNAL indicator composed of fluorescent indicator tube 5-point indicator display. o Tuning indicator. o Memory read-out indicator. o Memory write-in indicator. o FM STEREO indicator. 4.2 FM TUNER SECTION Front-End The FM front-end includes a dual-gate MOS FET RF amplifier (single stage) and a variable capacitance diode corresponding to a 4-ganged tuning capacitor. The local oscillator signal is applied to the synthesizer circuit for comparison with a reference signal, the resultant tuning voltage then being applied to variable capacitance diode for determination of the oscillator frequency (i.e. tuning frequency). lF Amplifier and Detector These employ 3 ICs and 3 dual-element ceramic filters. The IC (HA1201) of the first 2 stage constitutes a single-stage differential amplifier current-limiting limiter. The IC (PA3007-A) in the third stage, an improvement on the former IF system IC (PA3001-A), includes an IF limiter amplifier, quadrature detector, meter drive, and other circuits. Performance in terms of distortion, S-N ratio, delay characteristics, and other para- meters, shows a marked improvement in com- parison to the PA3001-A. Multiplex Decoder The recently developed multiplex decoder IC (PA4006-A) combines MPX decoding with muting functions in a single IC, thereby handling the functions of the more conventional MPX IC (PA1001-A) and AF MUTING Ic (PA1002-A). Distortion ratings and S-N ratio have been fur- ther improved by incorporating a chopper type MPX decoder. The chopper type switching circuit operates by switching the signal either to ground or to the through circuit, thereby eliminating the generation of unwanted noise or distortion. Fur- thermore, since the PA4006-A features DC direct- coupled switching with the detector, there is no deterioration in separation at the low frequency end. Besides the decoder and muting circuits, the PA4006-A also incorporates the pilot signal canceller, stereo auto selector, VCO killer circuit, muting amplifier, and muting control circuit. De-emphasis involves the use of the audio amplifier NFB circuit, while the muting gate is opened and closed according to the various muting signals from the internal control circuit and other external circuits. 4.3 AM TUNER SECTION See Fig. 4-1 for an outline of the AM tuner IC (HA1138). The tuning circuit employs a variable capacitance diode (vari-cap) which corresponds to a 2-ganged tuning capacitor. The local oscillator signal is compared with a reference signal in the synthesizer circuit, and the resultant tuning fre- quency then applied to the vari-cap for determina- tion of the oscillator frequency (tuning frequency). And in order to improve performance with strong input signals, the IC has been equipped with an AGC (automatic gain control) circuit, and the bar- antenna fitted with a. damping coil. The AGC varies the damping current by means of an FET according to the RF amplifier output level. AM STEREO OUT TO TUNING DETECTOR IO SYNTHESIZER CIRC U IT BAR- TUNING ANTENNA voLTAG€ AM TUNER IC {HAiI38) Fig. 4-1 AM Tuner Circuit www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com The AM STEREO OUT terminal on the rear panel is for connecting to an AM stereo broad- cast decoder adaptor. The signal appearing at this terminal is the mixer output passed via a buffer (emitter-follower) stage. 4.4 SYNTHESIZER CI RCUIT Outline of Basic Operating Principles An outline of the basic composition of the pLL digital synthesizer circuit is shown in Fig. 4-2. Although the actual circuit also includes a high speed scaling circuit because of the restrictions imposed by IC operational frequency limits, the basic principles are the same, and the circuit has therefore been omitted. The output signal fs of the voltage controlled local oscillator (VCO) undergoes 1/N frequency division in the progrurmmable counter, followed by phase comparison with the output signal fr from the crystal controlled reference oscillator. The output from the phase comparator is then passed through a loop filter to become a DC volt- age Vd which in tum controls the VCO. And since fs/N equals to fr in this closed loop, the VCO out- put frequency will be N times the reference fre- quency where N is an integer. Since the program- mable counter varies the frequency division numer- ator N according to program signal, the VCO out- put frequency fs (local oscillator frequency) will be determined according to the program signal, be- coming N times (integer multiple) the reference frequency fr. TO TUfIING VARI- CAP The data program signals used to designate FM/AM operation and the programmable counter frequency division ratio consists of BCD code pulse (A-D), time division pulse (T1-T4), and load pulse (L) signals. See Fig. 4-4 for an outline of the data program signal time chart. Numbers 0 to 9 are applied in BCD (Binary coded decimal) code to the synthesizer IC (TC9123P-GR) A-D inputs according to the T1-T4 timing. The unit digit of the reception frequency is applied at time T1, the ten digit at time T2, the hundred digit at T3, and the thou- sand digit at T4. This time shared data is then assembled by the latch circuit to form the fre- quency division ratio data. And since the thousand t t ,. l---l |.---l , . F F , a Fig.4-4 Data Program Signal Time Chart TO MIXER Fig.4-2 Basic Composition of the PLL Synthesizer Circuit Synthesizer Circuit in the SX-D5000 The composition of the synthesizer circuit employed in the SX-D5000 is outlined in Fig. 4-8. The major component in this circuit is the TC9123P-GR C MOS IC. Because of the restric- tions imposed by the operational frequency limits of this IC, the frequency of the local oscilla- tor during FM reception is divided by 8 in the ECL (emitter-coupled logic) prescalar IC (TD6102p) prior to being applied to the TCgl23P-GR IC. I --r*1or"j-.r,ir,--- --i +T,id I h;t qfr I S Y N T H E S I Z E R I C I T C 9 1 2 3 P - G R ) www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com digit will not involve any number except 1, fre- quency data is applied only to input A at time T4, the B, C and D inputs serving as for data desig- nating the FM/AM operational mode. Input L is the load pulse input employed to prevent mis- rading of input data. Data latching starts with down stroke of the load pulse. The SX-D5000 synthesizer system is operated on the basis of time division pulses (T1-T4) pre- pared by the synthesizer control IC (TC9124AP). Data transfer is based on dynamic time division. Operating During FM Reception Fig. 4-5 outlines the block diagtam of the SX- D5000 synthesizer stage during FM reception. With the basic operational step at 100kHz in Fig. 4-5, and the prescalar dividing the frequency by 8, the phase comparison frequency will be t2.5kHz. The reference frequency signal is obtain- ed by dividing the 6.4MHz crystal oscillator output by 512. And since the reception band is 87.5 MHz to 108MHz and the IF 10.7MH2, the local oscillator frequency will range from 98.2MHz to 118.7MH2. After dividing by 8 in the prescalar, this range will be 72.275MH2 to 14.8375MH2. Hence, the 12.5kHz may be obtained by setting the programmable countet frequency division ratio N to 982-1187 for comparison with the reference signal in the phase comparator. The phase comparator output is passed via a low- pass filter to the tuning circuit vari-cap, resulting in the local oscillator frequency being locked to 8N times the reference frequency (12.5kH2), or in other words, N times 100kHz. Since the reception frequency data (n) applied to the synthesizer IC (TC9123P-GR) is shown in the FL indicator tube (frequency display) as 875-1080, the required frequency division ratio may be obtained from the reception frequency data by programming for frequency division ratio N:n+107 during FM reception. 50kHz Step Operation (Model SX-D5000/S/G) The circuit shown in Fig. 4-5 will only change the reception frequency in 100kHz steps unless otherwise modified. By altering the frequency division ratio N, a 50kHz shift circuit may be activated with every second 100kHz frequency shift, resulting in the reception frequency being changed in 50kHz steps. The Fig. 4-5 circuit forms a PLL (phase locked loop) where the local oscillator signal is sampled, divided, and then locked to a frequency 8N times the referece frequency (12.5kH2). Consequently, any attempt to vary the local oscillator frequency will result in the voltage applied to the vari-cap be- ing changed in a way that wilI tend to cancel this variation. If then by some means a count can be obtained 50kHz lower than the actual frequency when the local oscillator is being sampled, it will be possible to alter the voltage applied to the vari-cap so that the oscillation frequency is increas- ed by 50kHz. The prescalar IC (TD6L02P) shown in Fig. 4-6 contains 3 separate 1/2 frequency dividers for a total frequency division of U8. If a single shift pulse is applied to pin 9, a pulse count at the Ll4 division stage will be eliminated. And if the shift pulse frequency is 72.5kH2, a total of 12,500 pulses will not be counted during the 1 second period. In terms of the IC input terminal (pin 2), this is equivalent to not counting 50,000 pulses within the same period, which in turn is equivalent to applying an input frequency which is 50kHz lower than the actual input frequency. The PLL consequently attempts to cancel this change, there- by increasing the voltage applied to the vari-cap so that the oscillation frequency is increased by 50kHz. The local oscillator frequency is thus locked at a frequency increased by 50kHz, thereby shifting the reception frequency by +50kHz. 98.2-118.7lVHz -12.275- t c ( T c 9 1 2 3 - G R ) Fig.4-6 50kHz Shift Circuit 1 0 Fig.4-5 Outline During FM Reception www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com The TC9123P-GR synthesizer IC has been designed to produce a 12.5kHz output signal (comparator signal) at pin 11 with every second step. By connecting this signal to pin 9 of the prescalar IC (TD6102P), input frequencies may be received in 50kHz steps. Operation During AM Reception Fig. 4-7 is a block diagram of the relevant parts of the synthesizer circuit involved in the reception of AM frequencies. With the reception band covering the 525kHz to 1605kHz rartge, and the IF signal set to 46Ok}Jz, the prescalar circuit is not required. Since frequencies are shifted in lkHz steps, the phase comparator frequency will be 1kHz. The reference signal is obtained by dividing the crystal oscillator fre- quency (6.4MHz) by 6400. With the local oscilla- tor frequency ranging from 985kHz to 2O65kHz, lkHz is achieved by setting the programmable counter frequency division ratio to the 985 to 2065 range, and this is compared with the refer- ence signal in the phase comparator. The output of this comparator is then applied to the tuning circuit vari-cap via a low-pass filter, resulting in the local oscillator frequency being locked to N times the reference frequency (1kHz). Again, since the reception frequency data (n) applied to the synthesizer IC (TC9123P-GR) is shown in the FL indicator tube (frequency display) as 525-1605, the required frequency division ratio may be obtained from this reception frequency data by programming the frequency division ratio as N:n+460 during AM reception. NOTE: The SX-D5000 has been designed with an AM CHANNEL STEP selector (1OhHz/9hHz). Iilhen switched to the ghHz position, the reception band becomes SSIhHz-l602hH2, the IF signal 459hHz, and the programmable counter frequency diuision ratio N= n+ 4 59= 9 9 0-20 6 1. 4.5 SYNTHESIZER SYSTEM CONTROL CIRCUIT The synthesizer control IC (TC9L}4AP) is an extremely complex IC, so the block diagram shown in Fig. 4-8 includes only the more important components. The IC input and output terminals are briefly described below. Time Division Pulse Terminals (T1-T4) Tlre time division pulse generated by TC9L?AAP (outlined in Fig. 4-4) is a time-sharing timing signal used in synchronizing almost all TC9124AP inputs and outputs. Reception Frequency Data Terminals (A-D) The A-D terminals are employed in the transfer of reception frequency data in BCD code, and are synchronized with the time division pulse. The reception frequency data is handled in BCD code by the A-D terminals during the T1-TB timing, and by the A terminal during the T4 timing (see Table 2). Furthermore, during the T4 timing, the B, C and D terminals are utilized in designating Table 1 Decimal Numbers and BCD Code Decimal Numbers &4-2-1 Code (BCDI 0 1 2 3 4 5 b 7 8 q 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 ' t 1 1 0 0 0 1 0 0 1 0 0 0 D 0 l 0 0 2 0 0 3 GNO VOD KI K2 K3 K4 X5 Fig.4-8 Block Diagram of Synthesizer Control lC N:985-2065 N : n + 4 6 0 n : 5 2 5 1 6 0 5 k H z Fig.4-7 Outline During AM Reception www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 'l 2 4 8 A B c D the operational mode of the synthesizer IC (TC9123P-GR) as shown in Table 3. The SX- D5000/KU model employs AMl or AM2 (switch- able) and FME. NOTE: The SX-D1OO}/S/G model operates in AMI or AM2 (switchable) and FME. Table 2' Reception Frequency Data Manual Thning With an input applied to K4 according to T3 timing for a short period of time, the reception frequency is shifted downwards in steps of 100kHz during FM mode, and lkHz during AM mode. If the input is applied longer than a speci- fied length of time, the down shift will proceed at a rapid rate, coming to a stop only when the input is stopped. Likewise, when an input is applied to K4 according to T4 timing, the re- ception frequency is shifted upwards (see Fig. 4-10). Note that during manual tuning, the reception frequency shift will stop when either the upper or lower band edge is reached. Auto Scan Tuning The auto scan tuning mode is activated when an input is applied to Kl according to T2 timing. When the AUTO/MANUAL switch (in Fig. 4-10) is set to the AUTO position, the emitter of Q26 is connected to K1. If Q25 has been turned off with the base of Q26 connected to T2, q26 will subsequently turn on and off synchronized by T2. When either the UP or DOWN key is pressed, T3 or T4 will charge up C113 via D30 resulting in Q24 being turned on once the base voltage has reached a certain value. Q25 will consequently be turned off, and Q26 will operate according to T2 synchronization. An input synchronized by T2 will then be applied to Kl, resulting in the start of the reception frequency scanning. This scanning action will commence almost as soon as either the UP or DOWN key is pressed, and will continue after the key is released. If either bandedgeisreached, the reception frequency scanning will not stop, but proceed in the reverse direction. The scanning will stop as soon as the AS terminal of the IC is switched to high level. If there is no muting signal, a stop pulse will be applied to the AS terminal to stop the scanning. The generation of the stop pulse is described later under section "Auto Sean Stop Circuit". Since there is no means for detecting the carrier frequency during the reception of AM broad- casts, the auto scanning operation would be likely to stop 7 or 2kHz prior to the actual central frequency when the input signal is very strong. So in order to avoid this, the auto scan mode has been programmed to stop only at frequencies which are integer multiples of 10kHz (AMl mode) or 9kHz (AM2 mode). Frequency data unit digit 1 0 Ten dioit 20 - 4 0 80 Hu ndred digit FM 87.5-108MHz FM Europe: 50kHz steps FM 76-90MHz AM inter-station steps: 10kHz AM inter-station steps: 9kHz 100 200 400 800 F M U FME F M L AM1 AM2 1 1 ( 0 o r 1 l 1 1 0 0 1 0 0 1 1 1 0 0 Input Terminals (Kl -K5) K1-Kb handle the different command inputs according to the operation key input and the relevant T1-T4 timing. o Operation Designation A Kb input determined according to T2 timing conesponds to FM mode, while a similar input determined according to T1 timing corresponds to AM mode. By applying an input to U/L according to T3 timing, the FM reception band is switched to FMU (87.5-108MHz). By apply- ing an input to U/L according to T4 timing, the AM reception band is switched to AMl. Unless otherwise specified, AM reception is in AM2 mode. NOTE: The SX-D5000/S/G model is designed for FME mode operation (input applied to Kl terminal according to TI timing). FM tg ST€P AM +B Table 3 Operation Designation Data M o d e I B C D AM CHANNEL 1 2 Fig. 4-9 Operation Mode Designation www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com o Preset Tuning The SX-D5000 can store up to 6 FM frequen- cies and 6 AM frequencies in its memory. When an input is applied to K2 according to T2 timing (MEMORY key), and then an input applied to K1-KB according to TB and T4 timing within a prescribed length of time (3 secondsXSTATION CALL key), the tuned frequency will be stored in one of the memories (L) to (6) (see Fig. 4-11 and Table 4). And by switching between AM and FM bands (an input applied to Kb according TB and T4 timing), frequencies may also be stored in memories (7) to (12). Then when a STATION CALL key (1 - 6) is only pressed, the frequency data stored in the corresponding memory may be retrieved for immediate tuning to that frequency. Auto Scan Stop Circuit (Fig. 4-10) o AM Tuning Detector This circuit detects the auto scan stop data slgnal during AM reception. The tuning condi- tion is detected by applying the AM IF signal to a narrow band filter and then amplifying and rectifying the signal. The rectified output is inverted by Q17, and AM tuning detector output is switched to low level when the fre- quency is tuned. The rectified output is also passed via Q18 to become the AM tuner signal meter drive output. NOTE: Although accurate tuning cannot be detected by this circuit alone, the mechanism by which the auto scan tuning mode is stopped only at frequencies which are l)hHz or ghHz (switchable by AM CHANNEL STEP selector) integer multiples does enable accurate tuning. FM Tuning Detector When the input level is very weak, or when tuning away from a station, a DC voltage appears at pin 13 of the FM IF system IC (PA3007-A). This output signal is switched to low level when the frequency is tuned. Stop Pulse Generation The auto-stop pulse is used to halt the auto scan mode. The low level output of FM tuning detector corresponds to correct tuning during FM reception, and during AM reception. Further- more, the low level output of AM tuning detec- tor corresponds to tuned status during AM reception, and during FM reception. Consequen- tly, when a frequency is tuned during either AM or FM reception, the Schmitt circuit (Q10, Q11) output is switched to low level. As a result, Q51 is turned off, and collector voltage increased. This voltage is then inverted by inverter Q49 (13-12), and differentiated by C737lF-t97 in order to detect the voltage change. The resultant voltage is inverted by Table 4 Memory Designations Memory (11 (3t (5) ( 1 . 3 . 5 ) + 6 Memory (2) (41 (6) 1 2 , 4 , 6 1 + 6 Fig. 4-11 Memory Write-in Circuit K1 K2 K3 K5 I I I - - - l AM SIGNAL METER OUTPUT i l - , I L € MUTING SIG NAL l I SCHMITT CIRCUIT HA1I38 IAM TUNER IC) IF OUT Q49-1/6 { FM IF SYSTEM IC) Fig.4-10 Auto Scan Control Circuit www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com inverter Q49 (10-9), and then applied via D26 to the AS terminal of TC9L24AP as a positive pulse (detected when Q51 is turned off). The auto scan mode is thus brought to a stop. If the AUTO/MANUAL selector is set to the MANUAL position, the AS terminal is switched to high level via D29, thereby preventing com- mencement of the auto scan operation. Auto Memory When switching back and foth between FM and AM bands, the reception frequency data (in the main register) is automatically transferred to the sub register, and the contents of the sub register automatically transferred to the main register (i.e. exchange of data). This operation is progr€rm controlled. Consequently, whenever the FUNC- TION (FM or AM) key is switched over, the for- merly tuned frequency is retuned automatically, thereby eliminating the need to repeat tuning procedures again for that station. Memory Holding When the synthesizer control IC (TC9724AP) INH terminal is switched to low level, an inhibit function is activated. The complete supply of operation clock signals within the IC is con- sequently stopped, thereby putting the IC into a complete static condition, and this condition is maintained as long as the inhibition is applied- there being no inputs or outputs handled whats- oever, even when any of the operation keys is pressed. Since this is a C MOS IC, the power con- sumption during inhibition mode is extremely small (measured in microamps). The TC9124AP power supply is backed by the subsidiary power supply circuit, and this main- tains the TC9124AP power supply even after the power switch has been turned off (STAND BY position). In this case, if the AM+B supplies are stopped, the memories will be maintained under inhibit mode. Furthermore, if the AC line supply is disconnected altogether, the memories will still be maintained (about 3 days) by means of a large capacitance capacitor (C2). 4.6 DISPLAY CIRCUIT OF THE TUNER SECTION Frequency Display The SX-D5000 displays the selected station fre- quency on a 5-digit digital display using a fluores- cent indicator tube (FL tube) as a source. As noted in Fig. 4-13, the FL tube display grids are divided into five independent units. Drive is by the dynamic time division method; a time cycle is divided into five divisions, and each digit pulsates in a recurring sequence. The flicker inherent in this method is not detectable by the human eye. o Time-share Converter Logic The SX-D5000 synthesizer system divides a time cycle into four parts (T1-T4) and uses pulse trains to transfer data. The synthesizer control IC (TC9124AP) outputs the BCD coded selected station frequency from terminals A, B, C and D as time-shared reception data, and transfers it on the clock pulses of T1 thru T4. (See Table 2) In order for this 4-paft time-shared reception data to appear on a 5-digit display, the time- share converter logic must convert the 4-part pulse signal (T1-T4) to a 5-part pulse signal Ti1-Ti5). NOTE: The selected station ftequency in the FM mode moues up or down the spectrum in l0ohHz steps in the SX- D5000/KU model, and thus could be displayed using a 4-digit display, however the step change in the SX- D5000/S/G model is 50hHz, necessitating a S-digit display. The same circuit is used in both models, consequently the Sth digit on the SX-D5000/KU model is always "0". In the AM mode, the selected station frequency changes in thHz steps and is displayed with four digits; the 5th digit being extinguished during this mode. Ftg. 4-L4 illustrates the configuration of the time-share converter logic. The terminals 1G thru 6G noted on the right side of the figure are connected to the FL tube grids (See Fig. 4-13). When no time division pulses (T1-T4) are present, the NAND gates 1 thru 4 (q47) and the NOT gate (Q49) output P, Q, R, S, and U respectively at a high level. Thus, Q5 thru Q9 are off; the FL tube grids are reverse-biased, and no light is emitted. Fig. 4-15 shows the time division pulse time chart. The time division pulses U, S, R, Q, and P shown in Fig. 4-75 arc applied to the bases of Q5 thru Q9. One by one they become active, providing dynamic time division drive to the 5-digit display. Fig.4-12 Memory Backup Power Supply Circuit www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com Referring to Fig. 4-14, pulse T4 (Fig. 4-L5-T4\ is applied to the clock terminal (T) of flip-flop 1 (Q46), the output E is as illustrated in Fig. 4-75-8. (Flip-flop 1 is reversed on the rising edge of T4, and divides the frequency of the pulse in half.) When a +B signal applied to the set terminal (S) of flip-flop 2 brings it to a high level, output G from the Q terminal goes to high level independent of the input at the clock terminal (T). Output M from ANDL (Q S) is gated by input G at a high level, and is equal to input E. It is illustrated by Fig. 4-15-E. AND2 (Q48) will gate when D52 is conducting, thereby setting input H to a high level. Output N is equal to input F, and is illustrated by Fig. 4-15-F. Output J from AND3 (Q48) is the AND of input N (Fig. 4-15-F) and T4 and is illustrated by Fig. 4-L5-J. The output P, Q, R, and S of NAND1 thru 4 (Q47) is the AND negation of input M (Fig. 4-15-E) and T1 thru T4, and is illustrated by Fig. 4-L5-P, Q, R, S. Output U from NOT (Q49) is the negation of input J (fig. 4-15-J) and is shown by Fig. 4-75-U. Through the use of the above logic gates the indicator time division pulses (Til-Ti5) are Fig.4-13 FL Tube 5-digit Digital Display synchronized with T1 thru T4, and provide for the display of the time-shared reception data (selected station frequency data) by the 1st through 4th digit of the FL tube. The time division pulse (Ti5) for the 5th digit is actually synchronized with T4, however, at this time the selected station frequency data is blocked out and substitute data is displayed by the 5th digit. This will be described later. Anodes of the FL Tube Drive Circuit The formulation of the numerical digits by the FL tube is accomplished by 7 segments, illust- rated as a through g in Fig. 4-13. (The first digit uses only b and c.) '[C9724AP transmits the time-shared reception frequency data T1-T4 as BCD code from terminals A, B, C, and D. (See table 2.) MB84016M (Q40) in Fig. 4-16 is an electronic switching device activated by the appearance of a Ti5 pulse, as represented by U in Fig. 4-15. It serves to inhibit the trans- mission of frequency data to the 5th digit. The frequency data is converted from BCD code to decimal number 7-segment display data by TC5022BP. The 7-segment display data is passed Fig.4-15 Time Division Pulse Time Chart TUNING INDICATOR SIGNAL INOICATOR T] l2 T3 r4 E f4/2 F lln J T i s P I T i I t _ o l r '2 R l r i 3 s lri4 , Lli5 Fig.4-14 Time-share Converter Logic Circuit 4 E i I I www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com through TC5066BP (non-inverting buffer IC) and applied to the anode segments (a thru g) of the FL tube. Each digit shares the segments a thru g connected in parallel, and each digit's independent grid is sequentially scanned by the pulses Ti1-Ti5, displaying the selected station frequency in a rapidly flickering display. The B, C, and D data passed on the T4 pulse is not actually frequency data (it is operation designa- tion data to TC9123P-GR). Q45 conducts with the appearance of T4, passing B, C, and D to glound via D49-D51, and thus avoiding un- necessary data being sent to TCb022Bp. The BL terminal of TC9L24AP outputs a display blanking signal (Fig. 4- ) during the period the time division pulses (T1-T4) are in transition. When this is applied to the BI terminal of TC5O22BP, the output (a-g) of TCb022Bp goes low level regardless of the level of input (A, B, C, D), thus preventing the blurring when transition is made from one display digit to another. With the appearance of Ti5, Q40 goes non- conducting bringing the 5th digit data A, B, C, and D all to a low level. This input state has the same meaning as zero frequency data to TC5022BP, thus a "0" is displayed as the bth digit on the FL tube. (During FM reception.) The FM/AM converter signal (low level during AM reception) to the prescaler IC is applied to the base of Q50, therefore Q50 is non-conduct- ing during AM reception. Thus with the transit of Ti5, the BI terminal (display blanking) of '[C5022BP goes to a high level, and all outputs (a-a) are low level, extinguishing the bth digit display during AM reception. o 50kHz Step Indication (SX-D5000/S/G only) The operation designation data for FM reception for SX-D5000/S/G is FME. (See table g.) During the FME mode, if data B is ,,1', (high level) with the transit of T4, + 50kHz shift operation is performed. Thus, when data B is at a high level with the transit of Ti5, the 5th digit of the FL tube displays a "5". Q40 goes off with the appearance of Tib. If at this time data B is at a high level, A and C, input to TC5022BP via D46 and D4? will go high level. This input state (A and C high level, B and D low level) mean a frequency data of "5", thus the 5th digit of the FL tube displays a "5". o Elimination of lst Digit Since there are 5 digits in the frequency display, the 1st digit will be "0" for any frequency under AM 1000kHz and FM 100.00MH2. In order to eliminate this zero (which in fact would turn out to be a "L" since the 1st digit only contains b and c segments), Ti4 is applied to the RBI terminal of TC5022BP. The 1st digit would be set to 0 when A is switched to low level, but set to 1 when A is switched to high level according to T4 timing. And since Q45 is turned on at Ti4 timing, B, C and D are switched to low level. The RBI terminal input (Ti4) is inverted by NOT1 to low level. So if A is switched to low level at T4 timing, the NAND2 inputs will both become low level, and the output high level. The ORB output will thus be switched to high level, resulting in all TC5022BP outputs being switch- ed to low level. Hence, there will be no zero display at the 1st digit. Fig.4-16 Anodes of the FL Tube Drive Circuit 1 6 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com D01 D02 D03 Station Memory Display D01- D03 of TC9L24AP obtain the memory (7-L2) call indicator output according to T1-T4 timing (see Table 5). Since the SX-D5000 stores up to 6 AM frequencies (in memories 1-6) and FM frequencies (in memories 7-72), and indi- cates these by means of 6 indicator lamps (LED), memories n and n+6 (n: 1--6) will be shown by the same LED indicator (see Fig.4-L7). The memory write-in display output is obtained from D00 according to T4 timing. When the MEMORY key is pressed and the MEMORY indicator lamp lights up, data may be written into the memory. If a STATION CALL key is then pressed during this condition the tuning frequency will be stored in the memory, and the MEMORY indicator lamp subsequently turned off. If none of the STATION CALL keys is pressed within 3 to 4 seconds, the write-in enable status will be released and the MEMORY indicator lamp turn off. Table 5 Memory Display Memory (11 (5) (7) Fig.4-17 Station Memory Display Circuit Fig.4-18 Signal Indicator Circuit Fig.4-19 Power Amplifier Circuit The current miror provides push-pull operation in this stage, which serves to cancel even harmonics and further increase gain. Q1 in the input circuit absorbs outflow of base current from Q2, and prevents the generation of a DC voltage. Because Q1 follows any temperature drift in Q2, temperature drift of the center point voltage is prevented. The pre-driver stage (Q4, Q5) is a Darlington arrangement, the load circuit of which employs a constantaunent source (Q6) resulting a high volt- age gain. Memory (3) Memory (4) 1 1 2 l ( 1 0 1 Signal Indicator The SX-D5000 signal meter is an FL tube b- point display driven by the meter drive IC (L81405)(see Fig. 4-18). The signal meter drive signals from the FM and AM tuner sections are applied to a set of 5 voltage comparators which are activated according to the difference between the applied signal level and respective reference voltage levels allotted to each comparator. e10- Q14 are thus turned on according to a priority basis, resulting in the corresponding signal indi- cation segment of the FL tube light up. 4.7 EOUALIZER AMPL!FIER This circuit is an NFB type tone control ampli fier with IC (HA12017P). 4.8 TONE CONTROL AMPLIFIER This circuit is an NFB type tone control ampli fier with IC (HA12017P). 4.9 POWER AMPLIFIER This amplifier is a Non Switching Amplifier system, employing the high speed bias servo- control circuit in the power output stage. The basic circuit €urangement of the power amplifier is shown in Fig. 4-19. The first stage is a differential amplifier comprising PNP twin transis- tor (Q2), the load circuit of which is a currenr mirror employing an NPN twin transistor (QB). Memory (2) (61 (81 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com The power stage bias voltage is supplied by the high speed bias servocontrol circuit. The high speed bias servocontrol circuit provides non- switching operation in the power stage (refer to "High Speed Bias Servocontrol Circuit"). The power stage (Q13-{16) is a 2-stage Darl- ington arrangement, the last stage is SEPP circuit. Furthermore, because there is not time constant in the NFB circuit in the low-frequency region, amplification is possible down to DC (DC inputs will be cut off, however, by the input coupling capacitor). The circuit features described above provide an extremely wide power frequency range (80\,V +80W, 2OHz to 2OkHz, THD 0.005Vo, 89"). High Speed Bias Servocontrol Circuit By operating the power stage only within the active region (no possible cut-off) and with mini- mum idle current, the high speed bias servocontrol circuit prevents the generation of switching dis- tortion and reduces heat loss. Operating Principle Since idle current flows through normal class B SEPP power stages (see Fig. 4-20) when no signal is applied, the DC level is shifted by D and VR by a fixed amount (with the voltage across points X and Y serving as a bias). The voltages across points X and Z, and Z and Y at this time will be equal. When the positive portion of a signal is applied to this circuit, the power stage current on the NPN side is increased, and the voltage (Vr1) across both ends of Rg1 also being increased, resulting in the voltage across point X and Z being increased. However, since the voltage across points X and Y is practically constant, the voltage across points Z and Y (PNP power stage bias) will be decreased, resulting in the PNP power stage being cut off. The high speed bias servocontrol circuit in- creases the voltage across points X and Y by the same amount as the voltage increase across points X and Z, thercby cancelling the voltage decrease across points Z and Y, and preventing the PNP power stage from being cut off. PRE- DRIVER Fig.4-2O Normal Power Stage Bias Circuit This high speed bias servocontrol circuit is out- lined in Fig. 4-21. When there is no signal applied to the circuit, Q1 and Q2 are almost cut off, while Q3 and Q4 will be on. The voltage across the collector and base of both of these transistors (Q3 and Q4) at this time may be disregarded. Con- sequently, with the power stage bias circuit con- sisting of 4 PN junctions formed by Q3, D3, and Q4, and VR1, this circuit is equivalent to the previous circuit shown in Fig. 4-20. With R1 and D1 ensuring a constant flow of cur- rent, the base of Q1 and point Z may be brought to the same level on an AC basis (level fluctuations due to the signal) by a simple shift in DC level. Furthermore, Q1 may be considered emitter- follower with RB as the emitter resistance. When the voltage across points X and Z is in- creased by the positive portion of the signal ap- plied to this circuit, it becomes the input signal of this emitter-follower (Q1). Since the emitter- follower voltage gain is practically 1, a voltage more or less equal to that of the input signal (That is, the voltage increases across points X and Z) is produced at R3. And the R3 voltage is the voltage applied across the base and collector of Q3 which forms part of the power stage bias circuit. So the bias voltage applied to Q3 will be in excess by the same amount that the voltage across points X and Z is increased (by positive portion of the signal) above the voltage level when no signal is being applied. Consequently, the increase in voltage across points X and Z cancels the decrease in volt- age across points Z and Y, thereby maintaining the idle current without cutting the PNP power stage off (noting that there actually is a slight decrease in current). For the negative portions of the signal, Q3 and Q4 are operated in the same manner, thereby preventing the NPN power stage from being cut off. In other words, the high speed bias servocontrol circuit acts to prevent any "power stage cut-off" signals from being applied to the power stage. PRE. ORIVER Fig.4-21 High Speed Bias Servocontrol Circuit 1 E l www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 4.10 POWER INDICATOR CIRCUIT The SX-D5000 output power indicators feature fluorescent indicator tube (FL tube). In this tube, thermionic emissions from the cathode are ac- celerated into the fluorescent substance of the segmental anodes, resulting in the emission of light. This tube is used to indicate numerals, letters, and other symbols. An outline of the FL tube drive circuit is shown in Fig. 4-22. The output circuit signal is applied to pin no.6 (4) of the IC (TA7318P-A). The IC con- tains a detector circuit, compressor (40dB), and peak hold circuit for both left and right channels. The dynamic range of the signal is thus contracted by 40dB to obtain a "peak held" DC voltage. The output power indicator segments of the FL tube are driven by the HA12010 ICs (one for each channel) equipped with L2 pairs of DC com- parator. These amplifiers are biased at increasing levels, so each amplifier will commence to operate separately as the input level increases. And since these amplifiers apply the voltages to the output power indicator segments, each successive segment will light up in turn as the input level rises. 4.11 PROTECTION CIRCUIT The purpose of this circuit is to protect the speakers and the power amplifiers. The relay in the output circuit is automatically opened in any of the following cases: 1. During the *transient operations" when the power supply is turned on and off. 2. Upon detection of an overload, caused by a short circuit in the load. 3. Upon detection of a DC voltage in the output caused by component failure or accident. Muting Operation when Power Supply is Turned On and Off With reference to Fig. 4-23 when the power supply is turned on, QB remains off due to +82 (The time constant of the +82 circuit isvery small). If there is no input (DC) on Q5 and Q6, they will be off, and the timing capacitor C1 charges up through R8 and R6, and thus Q4 turns on. When Q4 conducts, the relay operates, and the output muting on the power amplifier will be removed. When the power supply is turned off, +B2 will abruptly decay, and Q3 will conduct owing to the residual component of +B1. As a result, C1 will rapidly discharge, Q4 will cease to conduct, where- upon the relay will become de-energized and restore muting. Overload Detector The overload detector circuit incorporates the load (RL) in one side of a Wheatstone bridge. The base and emitter of a sensing transistor (Q1) are connected to the opposite corners of the bridge, so if RL decreases, Q1 will become forward biased. If RL falls below a prescribed value, Q1 will turn on, and Q3 will turn on, thereby C1 will rapidly discharge. As consequence, Q4 will turn on and the relay will become de-energized, thus causing the output circuit to open. DC Voltage Detector The output circuit is connected to the Q6 emit- ter and Q5 base via a low-pass filter (R9, C2). Any DC voltages appearing the output circuit of the power amplifier, it will be applied to the Q6 emitter and Qb base. If the voltage is positive, Q5 turns on. C1 will rapidly discharge. If the voltage is negative, Q6 turns on. C1 will rapidly discharge. As consequence, Q4 will turn on and the relay will become de-energized, thus causing the output circuit to open. Protection Circuit Fig.4-22 Power Indicator Circuit Fis.4-23 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 5. PARTS LOCATION Front Panel View Acrylic cover ANR.224 Front panel assembly-- ANB.95O Sub panel assembly C ANB-925 Knob (BASS, TREBLE) AAD.246 Knob A AAD.243 Knob (VOLUME) AAB.245 Front View with Panel Removed 3ganged push switch (MONITOR, ADAPTOR) ASG-249 FL indicator tube (Power) AAV-OO9 Lamo with wire AEL-145 Push switch (SPEAKERS, LOW FI L TE R, MO D E) ASG-257 Variable resistor (slide typel (BASS, TREBLE} ACX-107 fl Push switch (POWER) ASG-518 Phones jack (PHONESI AKN{28 Rear Panel View Terminal AKB-057 Slide switch (AM CHANNEL STEP} A S H O 1 5 Terminal (AM STEREO) AKB.O76 Bar-antenna AT8.619 Terminal (ANTENNA) AKA.O13 Terminal (TAPE, ADAPTOR ) AK8.063 c The [\ marh found on some component parts indicates the importance of the safety factor of the part. There- fore, uthen replacing, be sure to use parts of identical designation. Bonnet case ANE-31 1 Sub panel assembly B | . ANB-924 Knob A AAD-243 Knob A AAD-243 Knob B AAD-253 Knob (BALANCE) AAB-246 push switch (DUPLICATE} ASG-250 L indicator tube ( Frequency) AAVOOT Lamp with wire AELO75 Switch assembly A GWS-259 switch (AUTO/MANU AL, 7 Sttsl25tts, FM/AM MUTE) ASG-252 switch (MUTING -20d8) ASG-251 2-ganged variable resistor (VOLUME, BALANCE} ACW-502 Terminal (PRE AMP OUT, POWER AMP lN) AK8-061 IAC socket (AC AKPO42 OUTLETS} Terminal (SPEAKERS) AKE.O38 IAC power cord ADG-023 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com Top View with Bonnet Case Removed Power supply assembly GWR-124 fl Power transformer ( 1 20Vl ATr-717 Power ampl if ier assembly GWH.141 IFuse (8A] AEK-3O4 Bottom View with Bottom Plate Removed Switch assembly B GWS-260 Tone assembly GWG-151 rc _lIIr w *t lltil r l\1 Ir Tuner assembly GWE.138 F L assembly AWV{I5 qualizer assembly AWF.O47 SP switch assembly Gws-265 Tone VR assembly GWX-528 Push switch (POWER) ASG-518 Headphones assembly GWX-529 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 6. ADJUSTMENTS 6.1 TUNER SECTION FM Tuner o Connect the FM SG (F'M signat generator) to the FM ANTENNA 300s) terminal via 300O dummy antenna. o Set the FM swtich (FUNCTION) to the ON position, FM/AM MUTE switch to the OFF position. Stap :M SG (4O0Hz, t75kHz DEV.I Frequsncy on the display Adiustment point Adjustmont method Frequency Lot €l 1 No signal 87.50MH2 L4 Obtain a reading of DC 6V between terminals no. 61 and no.60 (ground). 2 108.O0MHz TC4 Obtain a reading of DC 20V between terminals no. 61 and no.60 (ground). 3 Repeat steps 1 and 2 until both requirements are satisfied' 4 90MHz 20dB 9O.O0MHz L1 Obtain maximum DC voltage reading between terminal no' 6 and no.4 (groundl. 5 L2 6 L3 7 106MHz 20dB 106.00MH2 TCI 8 TC2 I TC3 1 0 Repeat steps 4 to 9 until the maximum sensitivity. 1 1 98MHz 20dB 98.00MH2 T1 Obtain maximum DC voltage reading between terminal no. 6 and no.4 {ground}. 1 2 No signal T2.N Obtain a reading of DC OV between terminals no. 5O and no. 58. 1 3 98.OOOMHz* 6fr8 98.00MH2 TC7 Obtain a reading of DC OV between terminals no. 50 and no. 58. 1 4 98.0O0MHz' 66dB 98.OOMHz T2-D Obtain minimum distortion in the demodulated output (TAPE REC terminal). 1 5 Repeat steps 12to 14 until both requirement are satisfied. 1 6 set the FM/AM MUTE switch to the ON position. 1 7 98MHz 36dB 98.00MH2 V R 1 Obtain a position iust prior to activation of the muting circu it. 1 8 98MHz 66dB 98.00MH2 VR5 Obtain a light up all points in the SIGNAL indicator (S-points display). * Exact frequencY 22 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com Step FM MPX SG Adjustment point Adjustment method 1 No signal ( unmodulated) VR4 Obtain a 76kHz (within +2SQHzl signal at terminals no.49 and no. 57 (groundl. 2 Pilot (19kHz, r7.skHz DEV.) only VR2 Obtain minimum leakage of the 1gkHz pilot signal at the output (TAPE REC terminal). 3 Main (1kHz, L+R, 167.skHz DEV.) Pilot (1gkHz, t7.SkHz DEV.) T1 (by up to 90'in either direction) Reduce distortion in the output (TAPE REC terminal) to a minimum. 4 Main (1kHz, L or R, t33.75kHz DEV.) Pilot (19kHz. t7.SkHz DEV.) VR3 Obtain minimum cross talk between left and right channels at the output (TAPE REC terminal). FM Multiplex Decoder Circuit o Connect the MPX SG (FM multiplex signal generator) to the FM SG external terminal. o Set the FM SG output to 98.000MH2, and 86dB (modulation mode to external), and tune the SX-D5000 to this position (98.00MH2). FM ANT trimmer FM SIGNAL IND. ADJ. FM MPX PLL VCO ADJ. No.61(+ FM Muting Level ADJ. FM MPX PLL VCO TP. t:] tl R ll@'l @ c t 0 trtr g 0 q @ . 5---l 0 0 00 n 0 T2.N FM DISCRI. T. ADJ. T2-D n ilr,* No.58 F M D I S C R I . TP No.50 Fig. 6-1 FM Adjustment Points and Measuring Points 23 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com AM Tuner o Connect the AM SG (AM signal generator) to the AM ANTENNA terminal via 1kO resistor. o Set the AM switch (FUNCTION) to the ON position, FM/AM MUTE switch to the OFF position. o Set the AM CHANNEL STEP switch to the 10kHz position. Step AM SG (tt{lOHz,30% MOD.I Frequenry on the display Adjustm€nt point Adiustment method Frequency Lovel 1 No signal 525kHz T3 Obtain a reading of DC 2V between terminals no. 61 and no. @ (ground). 2 1 6O5kHz TC6 Obtain a reading of DC 25V between terminals no. 61 and no.60 (groundl. 3 Repeat steps 1 and2 until both requirements are satisfied. 4 600kHz 40dB 600kHz Bar-antenna Obtain maximum DC voltage reading between terminal no. 6 and 5 l4OOkHz 40dB 1400kHz TC5 no.4 (ground). 6 Repeat steps 4 and 5 until the maximum sensitivity. 7 1000kHz 40dB 1000kHz T4 Obtain maximum DC voltage reading between terminal no. 6 and 8 F7 no.4 (ground). Slide the coil N o . 6 1 ( + ) AM TUNE DET. ffia 0 g 0 \sz 6) t---l @ il*o @ 0 0 0 0 0 0 R R 24 Fig. 6-2 AM Adjustment Points and Measuring Points www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com Itsm Adjustment point Msasuring point Value adjusted DC Balance V B 1 Between terminal no.23 and ground DC 0V (r30mV) VR2 Between terminal no.22 and ground ldle Current VR3 Between terminals no. 28 (+) and no. 25 (-) DCl2OmV VR4 Between terminals no. 17 (+) and no. 20 (-) VB5 Between terminals no. 28 and no. 25 DClSOmV VR6 Between terminals no. 17 and no. 20 6.2 POWER AMPLIFIER SECTION r Tum vR3, vR5 and vR4, vR6 fully around in the counter-clockwise direction, but set vR1 and vR2 to the center positions. without any load or input signal, turn the POWER switch on. No.28 No.25 No.20 No.17 Fig. 6-3 Adjustment Points and Measuring Points 6.3 POWER FL INDICATOR CALIBRATION 1. Apply a lkHz signal to the POWER AMp IN terminals, and adjust the level of this input signal so that the voltage on the output (SPEAKERS) reads 8.gbv (AC). 2. Adjust VR1 (L) and VR2 (R) so that the output power indicator reads 10 watts. { 1 ) \ vRs Sip.t nta A : Miuniq pint. ThG fL m.* l@d on bre cmtsmt Fdr idd6 rh. im pdft! of th! ehy lxror ol th. F. Th..toro, tu .@t-,q, b ro to ur Fdr ot hrb.td6lFnb. SITCX€S: S 4 - l : T f E r c N t r c F { l ) O N - q E E Si4-2: Ttr€ MO{|TOR(2) ON-qEE sr4-3: aoAPrcR oN - gf! Sl5- | : nf ML|CATE(I>Z) ON - gEE SE-2: IAPE MLTCATE(z-D ON - OFF St5-3: TFE q.JPLTATEIGF} on - -w S F r : F U N C T | O N ( p H o r c ) d - r r S-2: FUNCTtOil (AUx) ON-OF-F sr6-3: FurclroN ( aM , ol - G s6{: FUrcTPN ( Ft) q!- OFF Sl7 : LOUONESS ON - OF s l 6 : M U T r m ( - 2 o d 8 t m - c - F S t g - l : S P E A X E m l A l m - F r S€-2: SPAXERS (a) Oil-gEE 519-3: LOW FLIER ON-.g!! sr9-4: MOoE sTEtrO -MONO s2o: PowER --d -srno-av Tbuffilid idd6lh.*ild pith. Thit b th. bb dmrt diryh, br S. r&d ciroir mv v.ry tu! to i6p.d.ffir! in d6i9. - I I B , o M | .-* l ' - swrTcH A3!t (o) Gws-2s8 tr6 *"t ^ ' 3 > - POWER SUPPLY A!s) @ot zs @ 2g 22 omg 2s 0204 zs rs6-ar0 /^c 250 eG-02l A A FU' '' A"-"' A a 9r n !----- - -- -'l e22 3 2 @@@@ @@ l m s , 2 r 4 t E E 2 ursfrtdto swfcED & xrx tw tlr www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 4 6 5 -_l I I I Q1t2 AAtzdTP IONE SP t- I I Tffi1 " l i : " ] " l ..il . - l o - l PLAY 2 -l G f f i l ^"",:*l' t6;vl II aoe our I "*, -l sra: lE nrm I /^uflff | -fi1 6G-24e ; __i__i_"Ii H Artl (Dl GWS-258 I crlg 4 I o.o.t T I L__i TUNER A$'y GWE-t3e t2/21 vRr.rcLUtE/4ArC€ I I r l t l t l l _ l SP SWITCH Arrrt GWS-265 fi/3) . _ PowER SUPPLY E"l__g!!_131_ tr" ozd z$€ao a2os 2sa€s. c_l"?9 | ' @ 2sK3. ozos zsirq trGULAToR ) 02lO rPcTAilOAa 02€ rsr555 Ol TA73i8P Oa3 HAlzOlO MEER AMP CoMPARAU & FL MIVE 6 5 4 o20t 2sc2575 QA7 2SA92 ozsr 2scr9r5 oeo€ 2sa905 6&o 'G a s I www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 8 7 NOTE: The indicated semicondu only. Other alternatiue se are listed in the parts list. POWER AMP AiCy GWH-l4l ordtu to6 ilz -61 otG,lio sTv2x oil,il2,il?,!la loEz OllStil6 lsl355 t 23!125 1s24il Dt26 rZ-150 ol2e,€g ts?47r oro.toz 2st7?5a ABSORAEF _ l oro3Jg 2SA979 oto6,to6 ?se24 oroT,toa 2sA750 o{og,ilo 2scr9l5 Qftf,!12 2sa7g Qil3,il4 2SC!4OO oil3,fi6 2SA9O5 o!r7,t18 2SA75O oil9.r20 2SC!4@ d2t.l22 esa904a Qr23,r24 2SCr9l4A of 25.f26 6CZ27a 0127,128 2SA9A5 Ol29!l32 2SC2575 q33 zsAlloo ot34 2SCl384 oto3! 128 POWER AMP I I o'o:- rzs l - PoWER FL A$! Awv-Ot7 SP SWlTCti Arc, GWS-265 l!/3t HEADPHONES GWX-5A9 l--*-"--l sP-a L - SP.A ItttE 8 7 + I LEO A$l GwX-531 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 10 ted semiconductors are representatiue ones r alternatiue semiconductors may be used and the parts list. f?'5:t6l sP-8 6 J 11 External Appearance of Transistors and lCs 2SA979 2SA912 NFE 2SC1384 2SA750 2SC1400 25K34 TA7318P HA12017P ,ro.^"-ffit"'"" n"-fu,*.n" A ''PE'!e ffi-r.. .",n.ffi" 1l\ s !\ c ; B 258706 2SD746 258706A 2SD746A 2SA904A 2SC19144 2SA905 2SC1915 2SA986 2*,2275 Typc No 2S8834 2SD836A 2SD880 2SD313 2SC177s - E pPC73M08H N ',o"*Nl ,,,"*-ffi-fj*' *lF"'* m""' 2SA1100 2SA7265 2SC2575 11 10 2*2291 12 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com 9. ELECTRICAL PARTS LIST NO?ES: . When ordering resislors. first conuert resistance ualues into co(le form as shown rn the fo llou)ing e ramples. Er. 1 lvhen there are 2 effectiue digits (onf digil apart trom 0), such os 560 ohm and.17h ohm (lolerance is shobn by J = 51,, ond K = I0V,). 5 6 0 a 5 6 x 1 0 ' 5 6 1 . . . . . . . . . R r T j P . S [ 5 6 [ ] J 4 7 h t t 1 7 x 1 O r 1 7 3 . . . . . . . . R D t / 1 P S A A A J 0 . 5 a 0 R 5 . . . . . . . . . . F N 2 r { o E E K 1 r l o 1 0 . . . . . . . . . . R s l P o m o r Erc. 2 When there are 3 effectiue digits (such as in high precision metal film resis torc). 5.62hsr 562 x t0' . The !::\ marh found on some component parts indicates the i portance of the satet! factor of the part. Therefore, uhen replacing, be sure to use parts of ide nt ical desisnation. Miscellaneous Parts ELECTRIC.PARTS P6rt No. Syhbot & Delcriplion Counter FL assembly Pow€r FL assembly Power amplilier assembly Power supply assembly Equalizer assembly Tone assembly Tone VB assembly SP switch assembly Headphones assembly LED assembly Part No. Symbol & O.scription l\ Arr-717 ATB€19 AEL-l26 AE L.,I41 AEL{75 AEL{75 AE L-145 ,A AEK-304 E AEK-106 A AsG-stg a AcG{01 AWV-o15 GWH-141 GWR-'t24 AWF.o47 GWG,151 GWX-52a GWS-265 GWX.529 GWX-531 T1 Power transformer (120V) f2 8ar-antenna PLl, PL3 L.mp with wire PL2, PL4 Lamp with wire PLs Lamp with wire PL6 PL7 F U l FU2 _ FUs s20 Fuse (8A) Fuse (1A) Push swilch (POWER) Cersmic capacitor {o.01/250v} Ceramic cspacitor Resistor (2.2M) Transistor Tuner Assembly (GWE.138) COILS AND FILTERS Pan No. Symbol & Doscription ACG-017 C2 ^ CKDYX l(XM 25 C3 _ C5 AACNO2g Rl FM ANT. coil F M R F c o i l F M R F c o i l FM OSC coil RF choke coil F M I F T FM DET translormer AM OSC coil A M l F c o i l FM ceramic filter Low-pass filter AM ceramic filler AM ceremic filter crystal resonator 2SD746-R. (2SD746.0) (2SD746-S) {2SD746A-R) (25D746A-O) (25D746A-S) 2S8706-R. (2S8706-O) (2S8706's) {2S8706A-R} (2S8706A-O) {2S8706A's) 01, 02 03, 04 Trensistor ATC-112 ATC-113 ATC-'�t 14 ATC-115 r24-O28 ATE{39 ATE,O45 ATB{67 ATB.068 ATF- t 09 ATF.O73 ATF.072 ATF.O71 ASS-003 CAPACITORS Part No, L I L2 L3 t4 L5, L7, L9 T1 T2 T3 T4 F,I _ F3 F4, F5 F 7 X,I 'hfe of Ol - Q4 should have the sam€ varue. P.C. BOARD ASSEMBLTES Pen No. Description Symbol & Dsscription GWE-138 GWS-258 GWS-259 GWS.260 GWS-261 47 Tuner ass€mbly Switch sssembly D Switch assembly A Switch assembly B Switch assembly C ACM-008 ACM-006 ACM{t0 TCl - TC3, TC5, TC6 Film trimmer -lC4 Ceramic trimmer l u l F r l m t n m m e r www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com Pert No, When ordeing rcsistors, convert the resistance ualue into cod.e form, and then rewite the port no. aB before. Symbol & D6cription ccDRH O60D 50 ACG-018 ccDcH 02oc 50 ccDcH 030c 50 ccDcH 050c 50 ccDcH t01J 50 ccDRH 080D 50 ccDR H 150J 50 ccDRH 33oJ 50 ccDTH 030c 50 ccDTH 080D 50 ccDsl 020c 50 ccDsL o70D 50 ccDsL 100D 50 ccDsL 220J 50 ccDsL 101J 50 ccDsL 151J 50 ccDsL 221J 50 CGB R47K 5OO CKDYB 1O2K 50 CKDYF l03Z 50 CKDYX 104M 25 coMA 473K 50 coMA '�t53K 50 cosA 201J 50 cosA 431J 50 cosA 751J 50 cosA 152J 50 CEANL R33M 50 CEANL R47M 50 CEANL OIOM 50 CKDYF 4732 50 CEAN L 6R8M 50 CEA R22M sOL CEA R47M sOL CEA OlOM 5OL CEA 2R2M 5OL CEA 4R7M 50 L CEA ,IOOM 5OL CEA 22OM 25L CEA 22OM 5OL CEA 47OM 25L CEA 1O1M lOL CEA 221M lOL cEA 221t\4 16L CEA 331M 1OL CEA 471M lOL CEA 471M 16L 4A c1 C76 Cerarnic (39Op/50V) c34, C132 c14 c t 5 c't 29 cl0, c13 c24 c23 c 1 9 c22, Cas c9 ca7 c 1 1 9 c 100 c18, C30, C50, C13a c47 , C4A c96 c 1 6 c69, C70 c2,c4,c6 c8, c11 , C12. C17 , C20, c21 , C25, C27 C29, C33. C35, C52, c54, C78 - C80, C82, C83, C94. C99. c102, c105, c123, C125, C126, Cr 30, c136 c 1 1 8 c88 cl31 c84 c63, C64 c65, C66, Cl12 c127 c75 c73 c31, C36. C37, C39 - C45, C51, C71, c86, C90 - C92, C t 03, C104, c121. cl28, C133, Cr34, C139 c74 c l 0 1 , c 1 1 3 c93, C107 c5, c53, C55 - Cs8, C98, Cl06 c 3 , c 9 7 , C l 1 1 , C 1 1 4 C l 1 6 c49, C67, C68, Cl'�l0, C'�|37 c59, C60, C89, C109 c72, C81, C108 c124 c95 c46 c32, C120 c6't, c't 17 c122, C135 c71 Symbol & Doscription Note: RESISTORS Part No. c92-048 c92-O47 c92-O49 [. Rot /aelar raa .l R D 1 / 4 P M O O O J VR1, VR3, VRs Semifixed (47k'B) VR2 Semifixed (1ook-B) Semitixed (1Ok-B) Rt7, R18, R32, R35, R87. R93, R 116, R119, R174, R179, R183 Rl - R16, R19 - R31, R33, R34, R36 - R50, R52 - R69, R71 - R75,R77 - R86, R88 - R92, R94 - R115, R117, R118, R120 - Ft173, R175 - R178, R180 - R182, R184 - R215 R70 R5'�t, R76 R D1/2PS ooo J R Nl/4PO !DO! F SEMICONDUCTORS Part No. 1SV68-04 KV1226-Y' 1S1555 (152076) (152473) 2-1K261 35K73 2SA1100 (2SA733A) 2SC46l 2SC1919 2SC1923-O 25C2575 {25C94sa) 2SK34 25K 168 HAl13a HA1201 MBa4011M (pPD401'l C) 2SK168- E PA3007-A P44006,A TC9123P.GR TC9124AP TD6102P pPD4O27C M884016M pPD4069C pPO4081C Symbol & Description D l _ D 4 D5, D6 D7 - D19, D22 - D56 o20, D21 o1 09, o33 o�21,444 o 1 6 o3 o10, o1 l, ol7 - 419,422,424 - o32, o34 - O38, O42, O45, O50 - O55 o 1 5 012, 013, O20, O41, 056. O57 o't4 05, 06 447 043 a7 08 o39 04 046 o40 o49 048 * KV1226'Y consists of two vari-cap diodes with the identical characteristics, www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com OTHERS Part No. Counter FL Assembly (AWV-015) CAPACITORS Part No. Symbol & Doscription AKAOl3 Terminal (ANTENNA) AKB{63 Terminal (TAPE, ADAPTOR) Switch Assembly A (cWS-259) De.cription cEA 100M 50L Cl, C3 ccDsL 560J s0 c2 CKDYF 4732 50 C4 swtTcHEs Pert No. Symbol & Do$ription Note: When ordeing resistors, conDert the resiatdnce vdlue into code form, 6nd RESfSTORS then rewrtte the port no. as beforc. Part No. Symbol & Dslcription A Rot/lpur cooL R22 RDl/4PM otrtrJ R1 - R2't, R25- R52 ASG-151 SEMICONDUCTORS Pan No. 54 - S12 Tact switch Symbol & Descirption 'ts1555 {152473} AEL.325 OTHERS Pert No. D301 - D303, D3't0 - D3l3 D3O4 - D309 LED {Orange) S€MICONDUCTOBS Pe.t No. Symbol & Des.ription Symbol & D$cription 1S1555 {152473) 181405 D 1 , D 2 o1 AN R-249 LED Holder CBZ30P80FMC Screw Switch Assembly B (cWS-260) Pan No. fc50�22BP A2 TC5066BP 03 2SA1100 (2SA733A) 04 - 016 OTHERS Part No. Symbol & D.sciiption ASG-252 51 - 53 push swirch {AUTO/ AAVOOT Vl FL indicator tube MANUAL, FM25!s FM /AM MUTEI VBZ3OPO8OFMC SCrEW cosA 152J sO C201, C202 151555 D201 Diode {1s2473) Equalizer Assembly (AWF-047) Switch Assembly c (cws-2ol ) cAPAclroBs Symbol & Descliption Part No. Symbol & Description Part No. Symbol & Desc.iption ASH{15 S13 Slide switch (AM CHANNEL STEP) cEANL 4R7M 50 C1, C2, C19, C20 ccDs|. 101J 50 C3, Ot, C9, C10 cEA 471M 10L C5, C6 ccDsL 470J 50 C7, C8 coPA 183G 50 Cl1, C12 coPA 122G 50 C13, C14 coPA 683G 50 C15, C16 Switch Assembly D (cWS-258) Part No. Symbol & Doscription cKDYB 471K 50 Cl7, Ct8 ASG-249 S14 3-gansed push switch CEA 47OM sOL C21 - C24 (MONITOR, ADAPTOR) COMA 222J 50 C25, C26 ASG-250 S15 3-ganged push swirch {DUPLICATE} www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com Note: RESISTORS Part No. When ordeing rcsistors, conuert the resistonce oolue into code form, ond then rcufite the pdrt rro. oc before. Symbol & Delatiption OTHERS Pen No. Symbol & Dalcription RD.I /4PM trtrO J RN1/4PO ooD F SEMICONDUCTOBS Pan No. Rt - R6, R 11, R12, R17 -R24,R31 - R36 R7 - R10, Rl3, R14 Symbol & Do.criplion VR2. VR3 Variable {slide type) (BASS, TREBLE) ASG-25'�| Tone VR Assembly Pen No. sl, s2 (GWX.528) Symbol & Detcription Push switch (LOUDNESS, MUTING -20d8) ACX-107 HA12017P OTHERS Pert No. Push switch (FUNCTION) Terminal (INPUT) Power Amplif ier Assembly (GWH-141) CAPACITORS P.rt No, Symbol & Deacription ASG-256 51 AKB463 Tone Assembly (GWG-I51 ) CAPACITORS Part No. ()1, 02 Symbol & Doscription Syrnbol & Descriplion CEANL 4R7M 50 ccDsL 221J 50 ccDsL 470J 50 ccDsL 390J 50 coMA 332K 250 ACG{09 coMA 472K 50 ccDsL 221K 500 CEANP R22M 50 coMA 823K 50 CEA 471M 6L CEA ,IOIM 251 ctol, c102 cl03, c'�r04 c 1 0 5 - c t l 0 c l 1 1 , C t 1 2 cl 13. cl 14 Cl37 - C140 Ceramic (O.O47l150V) c 1 1 7 , C 1 t 8 c121 - C124 cl25, Cl26 c131, Cl32 c 133 cl34 When ordering resistora, co^vert the resiatonce Dalue into code form, ond then rcurite the port no. 05 before. Symbol & Dolc.iption CEANL R15I./l 50 ccDSL 101J 50 ccDsL 151J 50 CKDYB 471K 50 ccDsL 470J 50 coMA 332K 50 coMA 273J 50 CEANL OlOM 50 CEANL 1OOM 16 CEAN L 47OM 6 CEA 47OM 50L CEA 1O1M lOL CEANL R22M 50 CEANL 4R7M 50 CEANL R33M 50 Note: RESISTORS Part No, c1, c2 c7 - ct0 c3, c4 c11, C12 cl7, C'�r8, C3't, C32 c33, C34 c29, C30 c21 . C22, C35, C36 c37, C38, C39. C40 c15, C16 c19, C20, C27 , C28 c13, C l4 c23, C24 c5, c6 c25, C26 Whe^ ordering resistors, conuert the rcsistonce uolue into code form, ond then reuite the part no. as before. Symbol & Description Note: RESISTORS Part No. ACW-502 RDl /4VM trDDJ RD,I /4PM trOtr J SEMICONDUCTORS Pert No. 2{anged Variable ( V O L U M E . B A L A N C E ) RDl /4PM OOO J RDl /4PtV1 oooJ l\ not /epur oooL A aot /2psr oo o.l R N I H D O O K RS2P ODO J ACN{ 14 TH103,2 ACP-062 ACP-019 ACP{10 R l 0 1 - R 1 0 8 , R 1 1 1 , R 1 t 2 , 8 1 1 5 , R116, R 119, R120, R125, R126, R145, R146 R149 - R152, R157, R158, R171, R 1 7 2 , R 1 7 7 - R 1 8 1 , R 1 8 7 , R 1 8 8 R 109, R 1 t 0, R 113, R 1 14. R1 17. R1 18, a123, R124, R127 - A142, R147, R148, R 153 - R'�t 56, R 159 - R 164, R t69, R170, R185, R 186 R121 , R122,F�143, R144 Rt73, R't 74 R t 75, Rl76 R 165, R167 Th 101, Th102 VR'1, VR2 Semi-fixed (470k) VR3, VR4 Semi-fixed (100) VR5, VR6 Semifixed (100k1 V R l R21, R22 R3 - R20, R23 - R44, R47 , R4A, R51, R52 SyDbol & Description H412017P 01, 02 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com SEMICONDUCTORS Plrt No. 2S4750 (25A7265) 2SC 1915 2SA750 2SC't 400 2SA905 2SA904A 2SC1914A A 2sc2275-o. (2SC2275-P.) A zsnges-o. (2SA985-P.) Symbol & D..cription Note: RESISTORS Pan No. ACP{01 A RD1/4PMF trtrO J RDl/4PM OOtr J SEMICONDUCTORS Part No. Vlhen otdeing reebtota, conuert the re|iatonce volue ituto code forrn, ond then rewite the patt no. as before. Symbol & D.rcliption VR'1, VR2 Semi-fixed (2.2k) R 1 , R 6 R2 - R5. R7 - R10 2SC1775A-E1 0101, Ol02 (2SC17754-F*) 2SA979-F* 0103, O.tO4 (2SA979-G'l 'hfe of O10l and 0102 should have the OlO4 have the F-rsnk. thle of 0101 snd Ot02 shoutd havo the 0104 have the G-rank. 2SC2231 0105, 0106 E-.ank, if 0103, and F-rank, if 0103 and Symbol & Darcription 0107, 0108 or09. 0110 ()111. 0112, Or 17, Ol.t8 0113, 0114, 0119, 0120 0 1 1 5 , 0 1 1 6 4121, A122 4123, a124 o125, 0126 4127, a128 TA7318P.A HA120r0 MZ-250 (wz-2501 OTHERS P.n No. o1 02, 03 D I Symbol & Doacription A At-r-678 AAVO(x) vazS)P080FMc SP Switch Assembly P.rt No. Tl Heater transformor FL indicator tube Screw (3x81 (GWS-2651 Syfibol & D..cription R 1 , R 2 R49, R50 53 Push switch (SPEAKERS, LOW FILTER, MODE) 'hfe of 0125 - Ol28 shoutd have the same vatue. 2SC2575 2SC13a4 2SA1100 M2{61 (wz-o6 t I STV2H 10E2 (st80142) 1S 1555 { ts2076) 152471 MZ-150 (wz-r50) OTHERS Prrt No. RD1I4PM472J RO 1/4VM6g1J ASG-257 0129 - 0132 0134 0133 D101 - Dr06 D109, O110 o 1 1 1 , D l r 2 , D 1 1 7 , D 1 . t 8 D l 1 3 - D l 1 6 Dl23 - D125, Dl28, Dl29 Headphones Assembly (cWX-5291 Pert No. Symbol & DGcription A rsRooz PBZ3OP060FMC Relay Screw (3x61 Symbol & Darcription RS2P33IJ AKN{28 LED Assembly Pan No. R45, R46 Phones ieck (PHONES) (cwx.531) Symbol & D.sription R L l Power FL Assembly (AWV-017) CAPACITORS Part No. AEL-325 D1 , D2 LED (Orange) Symbol & D.lcription cEA 0R1M 50L Cl,C2 cEA 101M 25L C3 CEA R47M sOL C4 CKDYB 3:]2K 50 C5, C6 cEA 470M 50L C7 5 1 www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com Power Supply Assembly (GWR-124) OTHERS Pan No. CAPACITORS P.ri No, Symbol & D.lcription Symbol & D.-.iption A arr-719 PBZ3OPO6OFMC T1 Screw (3x6) Transtorm6r ACG{O4 CEA 47OM sOL CEA 22,IM ,I6L CEA 221M 8OL CEA 1OOM sOL CEA 1O2M 16L CEA 471M 35L CEA 471M 16L CEA 332M lOL CEA 221M 1OL ACH-353 CEA 471M ,I6L coMA 'to4K 250 ccDsL 101J 50 ACH-209 C2O1, C21 1 Coramic (0.01 /1 sOV) c207 - c210 c2l7 c202. c203 c224 c213, C214 c2't5 c216 c212 c2r9 C223 Electrolyric (2.2NPl c21a c221 , C222 c2u,c205 C225, C226 Electrolylic ( 1 2000/63) Vlhen odefing rcsbtor8, conuert the rcsbtance udlue into code form, and then rcwrite the port no. os before, Symbol & D..criplion 1O. PACKING Kev No. Pert No. Note: RESISTORS Part No. l\ RDl/2pS F troo J RDl/2PS ooo J A not/ePu p ooo.t RSIP otro J RDl /4PM qOO J SEMICONDUCTORS Part No. R220, R222 R212, R213, A217, R218 R203 - R206 R210, R216 R201,F�202, R207 - R209, R21'�t, R214, R214, R221 , R224 Symbol & Dsacription 25Dg80 (2SD313) 25K34 2SO8364 258834 (2585071 25A905 2SC1915 rrPC78M08H 2SA912 A 1oE2 {srBo1-02} Kz L1/tO '| s1555 {152473) A SR3AM4 MZ-110 {w2,110) o201 0202, 0206 0203 0209 0205 02G o204 o210 4207 D201 - 020�6, D213. D214 0207 D20€, D216 - D218 020f) - 0212 D2't5 1. AR8-382 2. AHA-255 3. AHC456 4. AHD€17 5. ADHOo4 Operating instructions Corner p6d Inside packing Packing case T-type FM antenna D.sc.iption -il www. xiaoyu163. com QQ 376315150 9 9 2 8 9 4 2 9 8 TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3 Q Q TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 http://www.xiaoyu163.com